AI: Thomas J. Watson, Jr., Seymour Cray, and Steve Jobs Compared: Computer Titans (Part II Seymour Cray)

Table of Contents

 

Seymour Cray

 

Seymour Cray

Seymour Cray’s YouTube Video

Seymour Cray’s Only Surviving Talk: “Cray-1 Introduction …

What’s All This About Gallium Arsenide?, lecture by Seymour …

The Rise and Fall of the Cray Supercomputer

These Computers Changed the World

 

Seymour Cray 10 Quotes

Okay, here are 10 quotes attributed to Seymour Cray, along with brief explanations to provide context:

  1. “Anyone can build a fast CPU. The trick is to build a fast system.”
    • Meaning: True performance comes from optimizing the entire computer system, not just the processor. Memory, I/O, and other components must be equally fast to avoid bottlenecks.
  2. “If you were plowing a field, which would you rather use: two strong oxen or 1024 chickens?”
    • Meaning: Cray’s analogy for his preference for a few powerful processors over many weaker ones (in the context of his time). He believed a streamlined design was more efficient for many scientific workloads.
  3. “Parity is for farmers.”
    • Meaning: A famous (and somewhat controversial) quote reflecting Cray’s willingness to omit parity checking (an error-detection mechanism) in some of his designs to achieve greater speed. He prioritized performance and believed his systems were reliable enough without it. This was said about the CDC 7600.
  4. “I don’t work with people very well, I guess. I just have never been much of a team player.”
    • Meaning: An honest admission of Cray’s independent and solitary work style. He preferred to work alone or in tiny groups.
  5. “The 6600 is a very simple machine. It just happens to be 10 times faster than anything else.”
    • Meaning: Highlights the elegance and simplicity of the CDC 6600’s design. Cray believed that simplicity often led to more incredible speed and efficiency.
  6. “I’m not a computer scientist. I’m a plumber.”
    • Meaning: A self-deprecating statement emphasizing his practical, hands-on approach to engineering. He focused on building things that worked rather than getting bogged down in theory.
  7. “I don’t think there’s any limit to the speed that computers can attain.”
    • Meaning: This phrase expresses Cray’s optimistic vision for the future of computing and his belief in the potential for continuous performance improvements. He was constantly pushing boundaries.
  8. “I like to work on my own, in a room by myself, and it’s sort of fun to pit myself against the unknown.”
    • Meaning: Describes his preferred working style and enjoyment of independently tackling challenging engineering problems.
  9. “You can’t fake quality, and you can’t fake speed. You can only achieve them through hard work.”
    • Meaning: There are no shortcuts to achieving high performance and reliability. It requires meticulous design, careful engineering, and relentless effort.
  10. “I guess I’m just an engineer. I see a problem, and I try to solve it.”
    • Meaning: A simple yet profound statement that captures Cray’s pragmatic and solution-oriented approach to his work.

These quotes provide valuable insights into Seymour Cray’s personality, design philosophy, and unwavering dedication to building the fastest computers in the world. He was a unique and influential figure who shaped supercomputing history.

Seymour Cray’s History

Seymour Cray with a Cray-1

(Wiki Image By Michael Hicks, https://commons.wikimedia.org/w/index.php?curid=47427003) 

 Seymour Cray was an absolute giant in the field of supercomputing. He’s often called the “father of supercomputing” for his groundbreaking work designing some of the fastest and most influential computers ever built. Here’s a look at his life, career, and contributions:

Early Life and Education (1925-1951):

  • Born: September 28, 1925, in Chippewa Falls, Wisconsin.
  • Early Interest in Electronics: He showed a keen interest in electronics from a young age, building radios and other gadgets as a child.
  • World War II Service: He served in the U.S. Army during World War II as a radio operator in Europe. After, he was sent to the Pacific Theater, where he worked on breaking Japanese codes.
  • Education: After the war, he earned a Bachelor of Science degree in Electrical Engineering and a Master of Science degree in Applied Mathematics from the University of Minnesota.

Early Career: ERA and UNIVAC (1951-1957):

  • Engineering Research Associates (ERA): Cray began his career at ERA, a pioneering company in the early computer industry, in St. Paul, Minnesota.
  • Codebreaking: ERA had its roots in wartime codebreaking, and Cray was initially involved in developing codebreaking machines and digital computers.
  • ERA 1103: He played a key role in the design of the ERA 1103 (later the UNIVAC 1103), one of the first commercially produced scientific computers. This machine established his reputation as a brilliant computer architect.

Control Data Corporation (CDC) (1957-1972):

  • Founding CDC: 1957 Cray co-founded Control Data Corporation (CDC) with William Norris and other former ERA employees. This was a pivotal moment, as it gave Cray the freedom to pursue his vision of high-performance computing.
  • CDC 1604: One of CDC’s first products, the CDC 1604 (released in 1960), was one of the first fully transistorized computers and a major commercial success. It was significantly faster than its competitors and solidified Cray’s reputation. It was considered the first supercomputer.
  • CDC 6600: This is where Cray truly revolutionized supercomputing. Released in 1964, the CDC 6600 was three times faster than the IBM 7030 Stretch, the previous record holder. It introduced many innovative architectural features, such as multiple functional units and a streamlined instruction set, still used in modern processors. Due to its innovative design, it was significantly faster than any other computer at the time.
  • CDC 7600: Released in 1969, the CDC 7600 maintained the CDC’s lead in supercomputing. It was even faster than the 6600, further pushing the boundaries of performance.
  • Focus on Speed: Cray’s design philosophy at CDC was centered on achieving the highest possible speed, even if it meant sacrificing some programming ease. He believed that raw performance was paramount for scientific computing.

Cray Research (1972-1989):

  • Founding Cray Research: In 1972, Cray left CDC to start his own company, Cray Research. He wanted even greater freedom to pursue his vision without the constraints of a larger corporation.
  • Cray-1: The Cray-1, released in 1976, was a landmark achievement. It was not only incredibly fast but also aesthetically striking, with its iconic C-shaped design and colorful exterior panels. It popularized the term “supercomputer” and became synonymous with high-performance computing. It used vector processing and a unique cooling system, making it even faster.
  • Cray X-MP and Cray-2: Cray Research continued to dominate the supercomputer market throughout the 1980s, with systems like the Cray X-MP and Cray-2 pushing the performance boundaries further. The Cray-2 was notable for its use of liquid immersion cooling.
  • Competition: Cray Research faced increasing competition from other companies, including Japanese firms, but Cray’s designs remained at the forefront of the field.

Cray Computer Corporation (1989-1995):

  • Spin-off: In 1989, Cray Research spun off Cray’s new project, the Cray-3, into a separate company called Cray Computer Corporation. This was done because the Cray-3 was a hazardous and expensive project.
  • Cray-3 and Cray-4: Cray focused on developing the Cray-3 and later the Cray-4, which used gallium arsenide semiconductors instead of silicon. These projects faced significant technical challenges and delays. He believed that gallium arsenide would be much faster than silicon.
  • Bankruptcy: Unfortunately, the end of the Cold War led to reduced spending on supercomputers. Cray Computer Corporation struggled financially and declared bankruptcy in 1995.

SRC Computers (1996):

  • Final Company: After the failure of Cray Computer Corporation, Cray founded SRC Computers, his final company. He wanted to explore new computer architectures.
  • Death: Tragically, Seymour Cray died on October 5, 1996, from injuries sustained in a car accident.

Seymour Cray’s Design Philosophy:

  • Speed is King: Cray’s primary goal was to build the fastest possible computer. He was willing to make trade-offs in other areas to achieve maximum speed.
  • Simplicity: He favored simple, elegant designs over complex ones. He believed that simplicity often led to greater speed and reliability. He once famously said, “Anyone can build a fast CPU. The trick is to build a fast system.”
  • Vector Processing: Cray pioneered vector processing, a technique that allows a computer to perform the same operation on multiple data elements simultaneously. This significantly accelerated scientific computations.
  • Innovative Cooling: Cray’s designs often generate a lot of heat. He innovated in cooling technologies, using refrigeration and liquid immersion cooling to keep his systems running at optimal temperatures.
  • Hands-on Approach: Cray was known for his hands-on approach to design. He was deeply involved in every aspect of his machines, from the overall architecture to minor details.

Legacy:

  • Father of Supercomputing: Seymour Cray is widely regarded as the father of supercomputing. His innovations revolutionized the field and paved the way for today’s supercomputers.
  • Architectural Influence: Many of the architectural concepts he pioneered, such as vector processing, pipelining, and the use of multiple functional units, are still used in modern processors and supercomputers.
  • Inspiration to Engineers: Cray’s relentless pursuit of speed and elegant designs continues to inspire computer engineers and architects.
  • Cray Inc.: Cray Research (later acquired by Silicon Graphics, then by Tera Computer Company) eventually became Cray Inc., still a major player in the supercomputer industry, carrying on Seymour Cray’s legacy.

Seymour Cray was a true visionary. He dedicated his life to pushing the boundaries of computer performance, and his contributions have had a profound and lasting impact on science, engineering, and the world.

 

Seymour Cray Staff and Employees’ table

You’re looking for information about the people who worked with Seymour Cray! While a complete list is difficult to compile, here’s a table with some notable individuals and their roles based on available information:

Name Role/Contribution Company/Period
Early Career (ERA and CDC)
William Norris CEO of Control Data Corporation (CDC) CDC (hired Cray and supported his early work)
Jim Thornton Engineer, a key collaborator on CDC 6600 CDC
Les Davis The engineer worked with Cray on early CDC machines CDC
Cray Research Era
Steve Chen Co-founder of Cray Research Cray Research
George Hanson Early employee, contributed to Cray-1 design Cray Research
Neil Davenport Chief engineer on Cray-2 Cray Research
John Rollwagen CEO of Cray Research (later Cray Computer Corporation) Cray Research, Cray Computer Corporation
Cray Computer Corporation
Steve Wallach Joined Cray Computer Corporation, worked on Cray-3 and Cray-4 Cray Computer Corporation
General Notes
“The Janitor” A lesser-known individual, but famously mentioned in a memo by Thomas J. Watson Jr. (IBM chairman) as being part of Cray’s 34-person team for the CDC 6600 CDC
Many unnamed engineers and scientists Cray relied on teams of skilled individuals to design and build his computers Across all companies

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Challenges in Compiling a Comprehensive List:

  • Limited Public Information: Detailed employee records are often not publicly accessible.
  • Passage of Time: Many of Cray’s early collaborators may be retired or no longer working in the field.
  • Focus on Cray Himself: Much of the historical focus is on Seymour Cray as the visionary leader, with less emphasis on individual team members.

Where to Find More Information:

  • Biographies of Seymour Cray: These may mention key collaborators.
  • Company Histories: Histories of Cray Research or CDC might provide details on leadership and teams.
  • Oral Histories and Interviews: The Computer History Museum and other organizations may have interviewed people who worked with Cray.
  • Online Searches: You can try searching for names or roles related to Cray’s companies on LinkedIn or other professional networking sites.

This table is not exhaustive, but it highlights some of the key individuals who contributed to Seymour Cray’s success. It reminds us that even visionary leaders like Cray rely on talented teams to achieve extraordinary things.

 

Seymour Cray Venture Capital table

While Seymour Cray is renowned for his supercomputer designs, he ventured into the world of venture capital in a less conventional way. Here’s a table summarizing his involvement:

Venture Capital Activity Description Outcome
Funding SRC Computers After leaving Cray Computer Corporation, Cray founded SRC Computers in 1989. He used his funds and investments from close associates to start the company, essentially acting as his venture capitalist. SRC Computers developed innovative multiprocessor systems, focusing on high-performance computing for niche markets. The company remains operational today.
Limited External Funding Cray generally preferred maintaining control and avoiding external influence, so he sought limited external funding for his ventures. This approach allowed him to pursue his vision without pressure from investors, but it also potentially limited the growth of his companies.
Focus on Technology, Not Finance Cray’s primary focus was always on technological innovation rather than financial gains. While his companies succeeded in specific areas, they didn’t achieve the widespread commercial success of companies like Cray Research.

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Key Takeaways:

  • Unconventional VC: Cray’s approach to venture capital was more about self-funding and maintaining control over his technological vision.
  • Prioritizing Innovation: Financial goals were secondary to Cray’s pursuit of cutting-edge technology and high-performance computing.
  • Lasting Impact: While not a traditional VC, Cray’s investments in his own companies led to the development of unique and influential computer architectures.

It’s important to note that Seymour Cray’s legacy is primarily tied to his supercomputer designs and his impact on the high-performance computing industry. His venture capital activities were a means to an end, allowing him to continue pushing the boundaries of computing technology.

 

Seymour Cray News table

You’re looking for a table summarizing notable news and events about Seymour Cray! Here’s a timeline highlighting key moments in his career and legacy:

Date Event Significance Source/Notes
1950s Designs the ERA 1103 One of the first scientific computers used for aircraft and missile design Early work showcasing Cray’s talent
1960 CDC 1604 released The first fully transistorized computer in the US, popular for scientific and business use Marked a shift towards more robust and reliable computers
1964 CDC 6600 launched World’s fastest computer for several years, introduced innovative architectural features Solidified Cray’s reputation as a leading computer designer
1969 CDC 7600 introduced Successor to the 6600, significantly faster, maintained CDC’s dominance Continued Cray’s push for faster processing speeds
1972 Founds Cray Research Established his own company to focus on supercomputer development A significant turning point in his career
1976 Cray-1 released First commercially successful vector processor supercomputer, iconic C-shaped design Revolutionized supercomputing and became a symbol of high-performance computing
1985 Cray-2 launched Even faster than Cray-1, with innovative liquid immersion cooling Showcased Cray’s continued pursuit of cutting-edge technology
1989 Founds Cray Computer Corporation New company focused on developing smaller, more affordable supercomputers Reflected Cray’s adaptability to changing market demands
1993 Cray-3 released The first computer to use gallium arsenide semiconductors faced challenges and limited production Highlighted the risks and complexities of advanced technology development
1996 Seymour Cray passes away The “father of supercomputing” leaves behind a lasting legacy His death was a significant loss to the computing world
2000 Cray Inc. formed Merger of Cray Research and Tera Computer Company Consolidated Cray’s legacy and continued his vision
Present Cray supercomputers continue to be developed and used for cutting-edge research Cray’s influence on high-performance computing remains strong today HPE Cray supercomputers are used in various fields like weather forecasting, scientific simulations, and AI research

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This table provides a glimpse into the significant news and events that shaped Seymour Cray’s career and the evolution of supercomputing. It’s a testament to his enduring impact on the world of technology.

 

Seymour Cray’s Humor

Seymour Cray, the legendary supercomputer designer, was known for his brilliance, his intense focus, and his unique, often understated, sense of humor. Here’s a closer look at Seymour Cray’s humor, drawing on anecdotes and quotes:

Characteristics of Seymour Cray’s Humor:

  • Dry and Understated: Cray’s humor was typically dry and delivered with a straight face. He wasn’t one for loud jokes or slapstick comedy.
  • Witty and Observational: He had a sharp wit and a keen eye for the absurdities of the world, particularly in the context of engineering and corporate culture.
  • Eccentric and Unconventional: His humor often reflected his unconventional approach to life and work, as seen in his unusual work habits and personal projects.
  • Self-Deprecating (at times): While supremely confident in his abilities, Cray also occasionally used self-deprecating humor, perhaps to downplay his genius or to connect with others.
  • Practical Jokes: There are a few stories that suggest he enjoyed practical jokes, although these were likely more mischievous than malicious.

Anecdotes and Quotes Illustrating His Humor:

  1. “I work when I’m awake.” and “No meetings before 4 PM.” – These reflect his preference for working late at night and his dislike for unnecessary meetings. It is humorous in how it is so contrary to normal business practices.
  2. The Tunnel: Cray reportedly built (or had built) tunnels under his property, variously described as a way to think, a hobby, or even preparation for a nuclear attack. When asked about it, his responses were often vague or humorous, adding to the mystique. This is an example of eccentric humor.
  3. The Backhoe: The story of Cray needing a new backhoe operator (himself) to get the proper permits to continue his tunnel digging is a classic. It highlights his unconventional approach to problem-solving and his dry wit.
  4. Small Teams: Cray famously preferred to work with small teams. When asked about team size, he reportedly said something along the lines of, “No more than 50. If I see more than 50 people on the project, I know it’s in trouble.” This is humorous due to its bluntness and exaggeration.
  5. “Parity is for farmers.” – This quote (referring to parity checking in computer memory) is a classic example of Cray’s dry wit and his focus on performance above all else. It’s humorous to those who understand the context of computer engineering. It is dismissive of accepted engineering practices.
  6. On being called the “father of supercomputing”: Cray reportedly downplayed the title, saying something like, “I just enjoy building things.” (Self-deprecating)
  7. Secrecy around Designs: Cray was known for being secretive about his designs, sometimes working alone or only revealing details to a select few. While not inherently humorous, this secrecy, combined with his other eccentricities, contributed to a certain mystique that had a humorous element to it.

How Cray’s Humor Manifested in His Work:

  • Unconventional Solutions: His willingness to challenge conventional wisdom and explore unusual approaches (like liquid immersion cooling) could be considered intellectual humor.
  • Focus on Simplicity: Cray’s designs were often surprisingly simple and elegant, a stark contrast to the complexity of other computers at the time. This minimalist approach has a certain aesthetic appeal that some might find humorous in its audacity.
  • Rejection of Bureaucracy: His disdain for large teams, meetings, and bureaucratic processes was a recurring theme in his career and a source of many humorous anecdotes.

In Conclusion:

Seymour Cray’s humor was an integral part of his personality and his approach to work. It was often dry, understated, and reflected his unconventional thinking. His witty remarks, eccentric projects, and occasional practical jokes have become part of the legend surrounding this remarkable innovator. While he was undoubtedly a serious and focused engineer, his humor provides a glimpse into the more human side of a man who revolutionized the computing world. His humor also helps to explain his enduring appeal: he was a brilliant engineer and a unique and fascinating individual.

 

Seymour Cray Supercomputers table

You’re interested in a table summarizing the supercomputers Seymour Cray was involved in designing! Here’s a breakdown, including some key features and their significance:

Computer Year Key Features/Significance
UNIVAC or ERA 1103 1953 * One of the first scientific computers. <br> * Used for aircraft and missile design.
CDC 1604 1960 * First fully transistorized computer in the US. <br> * Popular for scientific and business applications.
CDC 6600 1964 * World’s fastest computer for several years. <br> * Introduced innovative features like multiple functional units and peripheral processors.
CDC 7600 1969 * Successor to the 6600, significantly faster. <br> * Maintained CDC’s dominance in supercomputing.
CDC 8600 Cancelled 1972 * Ambitious design with multiple CPUs and advanced cooling. <br> * The Project faced challenges and was eventually abandoned.
Cray-1 1976 * First commercially successful vector processor supercomputer. <br> * Iconic design with a distinctive C-shaped cabinet.
Cray-2 1985 * Even faster than Cray-1, with innovative liquid immersion cooling. <br> * Used for complex scientific simulations.
Cray-3 1993 * First computer to use gallium arsenide semiconductors. <br> * Only one system was built due to high costs and a limited market.
Cray-4 Cancelled * Planned to be significantly faster than Cray-3. <br> * Project was canceled due to financial difficulties.

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Key Takeaways:

  • Early Innovation: Cray’s early work at ERA and CDC established his reputation for building high-performance computers.
  • Supercomputing Pioneer: The CDC 6600 and 7600 were groundbreaking machines that cemented Cray’s status as a leader in supercomputing.
  • Cray Research Era: With the Cray-1 and Cray-2, Cray continued to push the boundaries of performance and design, shaping the future of supercomputing.
  • Challenges and Setbacks: Despite his successes, Cray faced challenges with projects like the CDC 8600, Cray-3, and Cray-4, highlighting the complexities of pushing technological limits.

This table captures the significant milestones in Seymour Cray’s computer development journey. It showcases his continuous drive for innovation and his lasting impact on high-performance computing.

 

UNIVAC or ERA 1103 1953

ERA 1103

(Wiki Image Public Domain, https://commons.wikimedia.org/w/index.php?curid=2491748) 

 

ERA 1103 Circuits, Cycle Time, Cooling, Packaging, Interconnect, Machine Design, Software, and Marketing Table. Sales table

Okay, let’s separate the information about the ERA 1103 into two tables: one covering the technical aspects, including marketing, and the other focusing specifically on sales.

ERA 1103: Technical, Design, Software, and Marketing Table

Category Aspect Details Impact and Significance
Circuits Technology Vacuum tubes (various types, including diodes, triodes, and pentodes) for logic circuits. Selenium rectifiers for diodes. Resistors and capacitors as passive components. Vacuum tubes were the dominant active circuit element of the time. They were bulky, power-hungry, and had limited lifespans, which impacted the 1103’s reliability and required frequent maintenance.
Logic Design Boolean algebra as the foundation. Synchronous design with a central clock. Modified two’s compliment arithmetic. Enabled the design of complex logic circuits for arithmetic and logical operations. Synchronous design simplified timing and control.
Cycle Time Clock Speed Approximately 250 kHz to over 500 kHz (0.5 MHz). Determined the basic rate of operations. The 1103’s clock speed was relatively slow by modern standards but a significant advancement for its time.
Memory Cycle Time Around 36-54 microseconds (µs) per access (limited by magnetic drum memory). A major performance bottleneck. Accessing data from the drum was slow compared to the speed of the electronic circuits.
Instruction Execution Time Varied depending on instruction. Add/Subtract: ~72 µs. Multiply: ~252 µs. Divide: ~342 µs. Reflected the complexity of different operations. More complex instructions took longer to execute, impacting overall program execution speed.
Cooling Method Forced air cooling using fans and blowers. Specialized air conditioning units for the computer room. Vacuum tubes generated substantial heat, making cooling essential for reliable operation. Air cooling was the standard method at the time but had limitations in terms of heat dissipation capacity.
Packaging Structure Large metal racks and cabinets to house components. Modular design with some pluggable units. The 1103 occupied a large physical space. Modular design facilitated maintenance to some extent.
Components Vacuum tube sockets, power supplies, magnetic drum memory unit, and acoustic delay lines. Reflected the component technology available at the time. The size and weight of these components contributed to the 1103’s large footprint.
Interconnect Wiring Extensive point-to-point wiring. Limited use of backplanes. Various types of cables and connectors are used to connect modules and peripherals. Multiple bus structure (data, address, control). Point-to-point wiring was labor-intensive, error-prone, and difficult to troubleshoot. Using multiple buses was an early step toward improving internal data transfer rates.
Machine Design Architecture Stored-program computer. Binary arithmetic. One-address instruction format. 24-bit word length. Implemented the fundamental principles of modern computer architecture. The one-address format and 24-bit word length were design choices that reflected the technology and application requirements of the time.
Memory Magnetic drum memory (primary storage, 16,384 words, expandable). Acoustic delay lines (faster buffer memory). The magnetic drum provided a significant amount of storage for the time but was slow compared to later memory technologies. Acoustic delay lines were an early attempt to bridge the speed gap between the CPU and main memory.
Input/Output Punched paper tape (primary), Flexowriter (electric typewriter), later magnetic tape drives, line printers. Buffered I/O using delay lines. Interrupt system. Paper tape was a common I/O medium at the time. The Flexowriter provided a basic form of interactive input/output. The interrupt system and buffered I/O were important advancements for improving I/O efficiency.
Innovations Magnetic drum memory, interrupt system, buffered I/O, built-in floating-point hardware, multiple bus structure. These innovations were significant advancements for their time and influenced the design of subsequent computers.
Software Assemblers RAWOOP (Revision 0, I, II), SLEUTH, SNAP. Allowed for symbolic programming using mnemonics instead of pure binary code. Reduced programming complexity and made code more readable and maintainable. Showed the value of symbolic programming for productivity.
Interpreters EASE I, EASE II. Interpreted languages that provided a higher level of abstraction than assembly. Facilitated programming for users less familiar with the machine architecture.
Compilers A-2 Compiler, BIOR (Business Input/Output Rerun). Translated higher-level code into assembly language. This is a significant step toward high-level programming languages, enabling programmers to express algorithms more naturally.
Utility Programs Loaders, debuggers, input/output routines. Fundamental to the operation of the computer, enabling it to execute programs and interact with peripherals.
Libraries Floating-point routines, matrix operations, statistical routines. Essential for scientific and engineering computations, taking advantage of the 1103’s built-in floating-point hardware.
Operating System Rudimentary – System Supervisor. An early step towards operating systems, providing a basic level of automation and resource management.
Marketing Target Market Government agencies (Defense Department, Navy, Air Force, NBS, AEC), research institutions, and industrial companies (aerospace, engineering). These organizations had the greatest need for high-performance computing and the budgets to afford such a machine.
Sales Strategy Direct sales force, technical demonstrations, conferences, and publications. These were standard marketing techniques for the time, adapted to the specific context of selling a complex and expensive scientific computer.
Marketing Messages Speed, power, accuracy, reliability, floating-point hardware, problem-solving capabilities. These messages emphasized the key advantages of the 1103 and addressed the needs of the target market.

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ERA 1103 Sales Table

Customer Category Specific Customers Number of Systems (Approximate) Time Frame Notes
Government Agencies Defense Department, Navy, Air Force, National Bureau of Standards (NBS), Atomic Energy Commission (AEC) ~20-30 Early-mid 1950s These were the primary early customers. The 1103 was used for various defense-related applications, including codebreaking, weapons research, and other scientific computations.
Research Institutions Several, including university laboratories ~10-15 Mid 1950s Used for scientific research in various fields.
Industrial Companies Primarily aerospace and engineering firms ~5-10 The mid-late 1950s Represented early adoption of electronic computers in the commercial sector.
Totals ~46 1953-~1960 It is considered a commercial success for its time, especially in the scientific computing market. Helped establish ERA, and later Remington Rand’s UNIVAC division, in the emerging computer industry.
Brand Evolution Remington Rand acquired ERA and later merged into Sperry Rand. The machine was later marketed as the UNIVAC 1103 Reflected the consolidation in the early computer industry.

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Reasons for Success:

  • First commercially available scientific computer: The 1103 filled a critical need for high-performance computing in scientific and government applications.
  • Advanced Features: The 1103’s innovations, such as built-in floating-point hardware, an interrupt system, and buffered I/O, gave it a significant advantage over other machines of its time.
  • Strong Government Contracts: Early sales to government agencies provided crucial revenue and validation for ERA.
  • Technical Sales Force: ERA (and later UNIVAC) had competent technical salespeople who could engage customers in detailed technical discussions.

Conclusion:

The ERA 1103 was a pioneering machine that played a vital role in the early development of electronic computing and the growth of the scientific computing market. Its combination of advanced technical features, effective marketing highlighting them, and successful sales, particularly to government agencies, established ERA (and later Remington Rand’s UNIVAC division) as a significant player in the nascent computer industry. Despite the rapid advancements in technology that followed, the ERA 1103’s legacy as an important early scientific computer is secure.

 

CDC 1604 1960

CDC 1604 with a figure as scale

(Wiki Image By FlyAkwa – Own work, CC BY-SA 4.0, https://commons.wikimedia.org/w/index.php?curid=70701983) 

 

CDC 1604 Circuits and Cycle time table 

The CDC 1604, introduced by Control Data Corporation in 1960, significantly improved over the ERA 1103. It was one of the first fully transistorized computers, marking a major shift from vacuum tube technology. Here’s a table summarizing its circuits and cycle time:

Feature Details Impact and Significance
Circuit Technology
Transistors Germanium alloy-junction transistors: These are used as the primary switching elements to replace vacuum tubes. Smaller, faster, more reliable, and less power-hungry than vacuum tubes. Enabled significant improvements in computer performance and reliability.
Diodes Semiconductor diodes: Used for signal rectification and in logic gate implementations. Complemented transistors in logic circuits further contribute to solid-state technology’s advantages.
Resistors & Capacitors Discrete passive components: They are still used for biasing, filtering, coupling, and timing. They continued to play essential roles in circuit operation, although their form factors were shrinking.
Printed Circuit Boards (PCBs) Used for interconnecting components: Components were mounted on PCBs, with copper traces providing the connections. Improved manufacturing efficiency, reduced wiring errors, and made systems more compact and maintainable. Replaced much of the point-to-point wiring of earlier machines.
Logic Design
Boolean Algebra The foundation of logic design: The same principles were used for earlier computers. The underlying mathematical basis for digital logic remained the same.
Synchronous Design Clock-driven operation: A central clock is used for synchronization. Provided predictable timing and simplified design, as with earlier systems.
Transistor-Transistor Logic (TTL) Although the CDC 1604 used discrete transistors and not integrated circuits, its logic design was comparable in style to what became known as TTL. Improved noise immunity and speed relative to some earlier logic families.
Arithmetic Logic Unit (ALU) Performed arithmetic and logical operations: Similar capabilities to the 1103’s ALU but significantly faster due to transistor technology. The heart of the computer’s computational capabilities is now operating at much higher speeds.
Control Unit Orchestrated instruction execution: This function is similar to the 1103’s control unit but more sophisticated. Managed the more complex operation of the 1604, taking advantage of the faster circuitry.
Cycle Time
Clock Speed 5 MHz (0.2 µs clock cycle). Significantly faster than the 1103’s clock speed. Allowed for much faster execution of instructions.
Memory Cycle Time 6.4 µs per access. Used magnetic core memory, which was much faster than drum memory. Reduced the memory bottleneck. Enabled faster access to data and instructions, significantly improving overall performance.
Instruction Execution Time Varied depending on instruction:
* Add: 4.8-7.2 µs (register-memory)
* Multiply: 25.6 µs (average)
* Divide: 100 µs (average) Much faster than the 1103. Reflected the combined benefits of faster transistors, core memory, and improved circuit design.
Performance Enhancement
Pipelining More advanced pipelining than the 1103: Instruction fetch, decode, and execute stages overlapped significantly. Increased instruction throughput. Enabled the system to process multiple instructions concurrently, further enhancing performance.
Parallelism Multiple functional units: Allow some operations to be performed in parallel. Introduced instruction-level parallelism. Improved performance by enabling concurrent execution of different operations.
Buffered I/O I/O buffering: Similar concept to the 1103 but more efficient due to faster components. Allowed the CPU to continue processing while I/O operations were in progress, reducing idle time.
Interrupts Robust interrupt system: Allowed the system to respond quickly to events and handle I/O efficiently. Improved responsiveness and I/O handling. Enabled efficient multitasking and real-time processing.

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Key Takeaways:

  • Transistor Revolution: The CDC 1604 marked a major turning point with its use of transistors, leading to dramatic improvements in speed, reliability, size, and power consumption.
  • Core Memory: The adoption of magnetic core memory significantly reduced the memory access bottleneck that had limited earlier computers.
  • Enhanced Performance: The combination of faster clock speed, core memory, more advanced pipelining, and parallelism resulted in a substantial performance boost over the ERA 1103.
  • Foundation for Modern Computing: The CDC 1604’s architecture and design principles laid the groundwork for many subsequent generations of computers, including minicomputers and mainframes.

The CDC 1604 was a landmark machine that demonstrated the transformative potential of transistor technology and advanced architectural concepts. It solidified CDC’s position as a leader in the high-performance computing market and had a lasting impact on the evolution of the computer industry.

 

CDC 1604 Cooling, Packaging, and Interconnect table 

The CDC 1604, being a transistorized computer, represented a significant advancement over the ERA 1103 in terms of cooling, packaging, and interconnect. Here’s a table summarizing these aspects:

Aspect Details Impact and Considerations
Cooling
Air Cooling Forced air cooling: It still relied on fans and blowers, but significantly less heat was generated compared to vacuum tube computers. Lower power consumption and less heat: Reduced the burden on cooling systems and made the computer more reliable.
Reduced Air Conditioning Needs Less stringent requirements for air conditioning: While still recommended for optimal operation, the 1604 did not require the extensive air conditioning systems of its predecessors. Lower operating costs: Reduced the need for specialized and power-hungry cooling equipment.
Heat Sinks Used heat sinks on some components: Helped dissipate heat from higher-power transistors. Improved reliability: Helped to keep components within safe operating temperatures.
Packaging
Cabinets and Racks Smaller and lighter cabinets than the 1103: Housed the transistorized circuits, core memory, and power supplies. Reduced footprint: The 1604 occupied less space than its predecessors, making it more practical for a wider range of environments.
Modular Design Modular construction with pluggable units: Facilitated assembly, maintenance, and upgrades. Functionally partitioned sub-assemblies. Easier maintenance and upgrades: Modules could be easily replaced or upgraded, reducing downtime and extending the system’s lifespan.
Printed Circuit Boards (PCBs) Extensive use of PCBs: Components were mounted on PCBs, with etched copper traces providing the interconnections. Improved reliability and manufacturability: Reduced wiring errors, improved signal integrity, and made mass production more feasible.
Transistor Sockets Used sockets for some transistors: Allowed for easy replacement of individual transistors. Simplified maintenance: Made it easier to replace faulty transistors without replacing entire boards.
Power Supplies Smaller and more efficient power supplies: Transistorized power supplies were significantly more compact and efficient than the bulky vacuum tube power supplies of earlier computers. Reduced size and weight: Contributed to the overall reduction in size and weight of the system.
Interconnect
Printed Circuit Board Traces Primary means of interconnection within modules: Copper traces on PCBs provide the connections between components on a board. Reduced wiring complexity and improved signal integrity: Eliminated much of the point-to-point wiring of earlier computers, leading to more reliable and predictable signal transmission.
Backplanes Used for interconnecting modules: Provided a common bus for communication between different modules within the system. Simplified system integration: Made it easier to connect and disconnect modules, facilitating maintenance and upgrades.
Cables and Connectors Used for connecting peripherals and external devices: Cables and connectors were still used but were generally smaller and more manageable than those used in vacuum tube computers. Improved connectivity: Allows easier connection of peripherals like magnetic tape drives, printers, and card readers.
Bus Structure Well-defined bus structure: Enabled efficient communication between different parts of the system. This included instruction, memory, and I/O busses. Improved system performance: Allowed for parallel data transfer and efficient communication between the CPU, memory, and peripherals.
Coaxial Cable Used for high-speed signals and long-distance connections: Used to minimize interference between signals and provide impedance matching Improved signal integrity: This ensured reliable data transmission, especially for high-speed signals. This reduced errors in communication between units.

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Overall Improvements and Impact:

  • Increased Reliability: Transistors, PCBs, and improved cooling significantly improved the reliability of the 1604 compared to its vacuum tube predecessors.
  • Reduced Size and Weight: The use of transistors and PCBs led to a dramatic reduction in the size and weight of the computer.
  • Lower Power Consumption: Transistors consumed far less power than vacuum tubes, reducing operating costs and cooling requirements.
  • Easier Maintenance: Modular design and the use of PCBs and sockets made maintenance and upgrades much easier.
  • Manufacturability: PCBs and automated assembly techniques made mass production more feasible.

Legacy:

The CDC 1604’s advancements in cooling, packaging, and interconnect were crucial to its success and had a lasting impact on the computer industry. These improvements paved the way for the development of smaller, more powerful, and more reliable computers in the years that followed. The trends established by the 1604 – such as the use of transistors, PCBs, and modular design – became standard practices in computer design and manufacturing, shaping the evolution of the industry towards the integrated circuit era.

 

CDC 1604 Machine Design 

The CDC 1604, designed by Seymour Cray at Control Data Corporation, was a landmark computer that showcased significant advancements in machine design. Here’s a detailed look at its key design elements:

  1. Architecture:
  • Stored-Program Computer: Like the ERA 1103, the CDC 1604 stored both instructions and data in its main memory, adhering to the fundamental principle of the von Neumann architecture.
  • Word Length: 48-bit words. This was a substantial word size for the time and allowed for high precision in scientific computations.
  • Instruction Format:
    • 24-bit instructions
    • Could fit two instructions per 48-bit word
    • Instructions could address either a full word or half-word (upper or lower 24 bits).
    • Generally, a single-address format, where instructions specify one memory address and an implied accumulator.
    • Allowed for instructions that operated on either memory locations or operating registers.
  • Registers:
    • Six index registers (B1-B6): 15 bits each, used for address modification.
    • Accumulator register (A): 48 bits, used for arithmetic and logical operations.
    • Multiplier/Quotient register (Q): 48 bits, used in multiplication and division operations.
    • Program counter (P): 15 bits, holds the address of the next instruction to be executed.
  • Memory Addressing: 15-bit addresses, allowing for a maximum of 32,768 words (32K) of main memory.
  • Parallel Functional Units: This was one of the first computers to introduce instruction-level parallelism. This was done by means of having independent hardware units that could work in parallel. This included:
    • Shift Unit
    • Boolean Unit
    • Floating Add Unit
    • Fixed Add Unit
    • Two Increment Units
    • Divide Unit
    • Multiply Unit (could perform one pass per minor cycle)
  1. Memory:
  • Magnetic Core Memory:
    • Capacity: 32,768 words (32K) of 48-bit words.
    • Cycle time: 6.4 microseconds (µs).
    • Organized into two independent 16K banks that could be accessed simultaneously.
    • Significantly faster than the magnetic drum memory used in the ERA 1103.
  • Memory Banks: The core memory was divided into two independent banks, allowing for some degree of memory access overlap.
  1. Input/Output (I/O):
  • Buffered I/O: Used a separate I/O processor (the CDC 160-A) to handle communication with peripheral devices, freeing the main CPU from I/O tasks.
  • Data Channels: The CDC 160-A had 12 I/O channels, each of which could be connected to a peripheral device.
  • Interrupt System: A robust interrupt system allows peripheral devices to signal the CPU when they require attention.
  • Peripheral Devices: Supported a wide range of peripherals, including:
    • Magnetic tape drives
    • Punched card readers and punches
    • Line printers
    • Paper tape readers and punches
    • Typewriters (for console input/output)
  1. Instruction Set:
  • Comprehensive Instruction Set: Included instructions for:
    • Arithmetic operations (fixed-point and floating-point)
    • Logical operations
    • Data transfer
    • Branching and control flow
    • Indexing and address modification
    • Input/output
  • Instruction Categories:
    • Class 1 – Memory reference with indexing allowed
    • Class 2 – Memory reference for loading and storing index registers.
    • Class 3 – Constant to index register
    • Class 4 – Branch
    • Class 5 – Fixed point add and subtract
    • Class 6 – Floating point
    • Class 7 – Logical (Boolean)
    • Class 8 – Shift
    • Class 9 – Search
    • Class 0 – Miscellaneous, such as no-ops and I/O operations
  1. Performance Enhancements:
  • Transistorization: The use of transistors instead of vacuum tubes dramatically improved speed, reliability, and power efficiency.
  • Pipelining: Employed a more advanced form of pipelining than the ERA 1103, overlapping instruction fetch, decode, and execute stages to a greater extent.
  • Parallelism: Parallel functional units allow for the concurrent execution of different instructions. This was enhanced by the pipelining mechanism.
  • Core Memory: The faster core memory significantly reduced the memory access bottleneck.
  • Buffered I/O: Offloaded I/O processing to a separate processor, freeing the CPU for computation.
  1. Physical Design:
  • Modular Construction: A modular design with pluggable units was used, making maintenance and upgrades easier.
  • Printed Circuit Boards (PCBs): Extensive use of PCBs for interconnecting components, improving reliability and manufacturability.
  • Smaller Footprint: Significantly smaller and lighter than its vacuum tube predecessors.
  1. Software:
  • FORTRAN Compiler: CDC developed a highly optimized FORTRAN compiler for the 1604, making it attractive for scientific and engineering applications.
  • COBOL Compiler: A COBOL compiler was also available, expanding the 1604’s use into business data processing.
  • Assembly Language: Programmers could also write in assembly language for maximum control and performance.
  • Operating System (CO-OP Monitor): A basic operating system that provides job scheduling, I/O management, and other system services.

Impact and Legacy:

  • Supercomputer of its Time: The CDC 1604 was considered one of the first supercomputers and was used in many high-profile scientific and government installations.
  • Seymour Cray’s Reputation: The 1604 established Seymour Cray as a leading figure in computer design.
  • Influence on Future Designs: The 1604’s architecture and design principles influenced the development of many subsequent computers, including CDC’s own 3000 and 6000 series, as well as machines from other manufacturers.
  • Advancement of Scientific Computing: The 1604 significantly advanced the field of scientific computing by providing a powerful tool for researchers and engineers.

The CDC 1604 was a groundbreaking machine that represented a major leap forward in computer design. Its use of transistors, core memory, advanced pipelining, and parallel functional units made it a powerful and influential system that helped shape the future of computing.

 

CDC 1604 Software table

The CDC 1604 had a growing software ecosystem that supported its use in scientific, engineering, and business applications. Here’s a table summarizing some of the key software available for the CDC 1604:

Software Name/Type Description Significance
Operating Systems
CO-OP Monitor A basic operating system developed by CDC. Provided job scheduling, resource management, I/O handling, and program loading. Ran in the upper 4K words of memory. Enabled more efficient use of the computer’s resources. Supported batch processing and improved throughput. An early example of an operating system for a transistorized computer.
Compilers
FORTRAN 62 A highly optimized FORTRAN compiler. Translated FORTRAN code (a high-level language popular for scientific programming) into 1604 machine code. Enabled scientists and engineers to program in a more natural and productive way. CDC’s FORTRAN compiler was known for its efficiency and helped establish FORTRAN as a dominant language for scientific computing.
COBOL 61 A COBOL compiler. Translated COBOL code (a high-level language designed for business data processing) into 1604 machine code. Allowed the 1604 to be used for business applications, expanding its market beyond scientific computing. Demonstrated the growing importance of computers in business.
ALGOL An ALGOL compiler. ALGOL was another high-level language, influential in the development of programming language theory. Provided another high-level programming option, though ALGOL was less widely adopted in the US than FORTRAN or COBOL.
Assemblers
CODAP (Control Data Assembly Program) The primary assembler for the 1604. Translated assembly language code (a low-level, symbolic representation of machine instructions) into executable machine code. Provided programmers with fine-grained control over the machine’s hardware. Essential for system programming and performance-critical applications.
COMPASS A later, more advanced assembler for the CDC 1604 and other CDC machines. Offered improved features and capabilities compared to CODAP, such as macro processing and conditional assembly.
Utility Programs
Loaders Programs that loaded other programs and data into memory from punched cards, paper tape, or magnetic tape. Essential for program execution. Allowed programs to be loaded and executed.
Debuggers Tools that helped programmers find and fix errors in their programs. Allowed for inspection of memory, registers, and program execution flow. Crucial for program development. Made the debugging process more efficient.
Sort/Merge Utilities Programs for sorting and merging data files. Important for data processing applications, particularly in business.
I/O Libraries Collections of routines for handling input/output operations, providing a standardized way for programs to interact with peripheral devices. Simplified program development by providing pre-written code for common I/O tasks.
Mathematical Libraries
Floating-Point Routines Library of subroutines for performing floating-point arithmetic operations. Essential for scientific and engineering computations, taking advantage of the 1604’s floating-point hardware.
Matrix Operations Routines for performing matrix operations like inversion, multiplication, and other linear algebra functions. Widely used in scientific and engineering applications.
Statistical Routines Subroutines for calculating statistical measures and performing statistical analysis. Facilitated data analysis and statistical research on the 1604.

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Important Notes:

  • Early Software Ecosystem: While more advanced than the software available for the ERA 1103, the software ecosystem for the 1604 was still relatively nascent compared to modern systems.
  • CDC’s Role: Control Data Corporation played a major role in developing software for the 1604, including the operating system, compilers, and utility programs.
  • User Contributions: Users and user groups also contributed to the software library, developing and sharing specialized programs and routines.
  • FORTRAN’s Dominance: FORTRAN became the dominant programming language for scientific and engineering applications on the 1604, thanks in part to CDC’s highly optimized compiler.

The software available for the CDC 1604 played a crucial role in its success. The availability of high-level language compilers like FORTRAN and COBOL, along with essential tools like assemblers, loaders, and debuggers, made the 1604 a powerful and versatile machine for a wide range of applications. The software ecosystem surrounding the 1604 helped to drive the adoption of computers in science, engineering, and business, paving the way for the continued growth and evolution of the computer industry.

 

CDC 1604 Marketing table, Sales table

Let’s delve into the marketing and sales of the CDC 1604, one of the first commercially successful transistorized computers and a pivotal machine in establishing Control Data Corporation’s reputation.

CDC 1604 Marketing Table

Marketing Aspect Details Impact and Significance
Positioning
Performance and Affordability Marketed as a high-performance scientific computer at a more affordable price point than existing vacuum-tube machines or other transistorized computers. This combination of performance and affordability was a key differentiator, making the 1604 attractive to a broader range of customers.
Transistorized Design Emphasized the advantages of its transistorized design, including increased reliability, smaller size, and lower power consumption compared to vacuum-tube computers. This highlighted the technological advancement of the 1604 and addressed customer concerns about the reliability and maintenance costs associated with earlier machines.
Seymour Cray’s Design Leveraged the emerging reputation of Seymour Cray as a leading computer architect. Cray’s involvement added credibility and generated interest in the 1604.
Target Audience
Government Agencies Primarily targeted government agencies involved in defense, research, and other computationally intensive tasks (e.g., Navy, Air Force). These agencies had the greatest need for high-performance computing and were early adopters of new computer technologies.
Research Institutions Universities and research labs with a focus on scientific and engineering disciplines. The 1604’s performance and affordability made it attractive for academic research, helping to establish CDC in this market.
Industrial Companies Targeted industries with growing computational needs, such as aerospace and engineering firms. This represented an early foray into the commercial market for CDC, expanding the potential applications of their computers beyond government and academic research.
Marketing Channels
Direct Sales CDC employed a direct sales force, many with technical backgrounds, to engage with potential customers. This personalized approach was essential for selling a complex and relatively expensive product like the 1604. The technical expertise of the sales force was important for building trust.
Technical Publications Published technical papers and articles about the 1604’s architecture and capabilities. Helped to disseminate information and establish the 1604’s technical credentials.
Industry Events Demonstrated the 1604 at relevant industry events and conferences, although this was less common in the early 1960s. Provided opportunities to showcase the machine’s capabilities to potential customers.
Marketing Messages
High Performance Emphasized the 1604’s computational speed and its ability to tackle complex scientific and engineering problems. Appealed to the primary target audience of scientists and engineers.
Reliability Highlighted the increased reliability of transistorized circuits compared to vacuum tubes. Addressed a major concern of customers who were accustomed to the frequent failures of earlier machines.
Affordability Positioned the 1604 as a more affordable option than other high-performance computers, making it accessible to a wider range of organizations. This was a key differentiator and helped CDC gain a foothold in the market.
Innovation Promoted the 1604 as a technological breakthrough, showcasing CDC’s engineering expertise and innovation. Helped to establish CDC as a leader in the emerging field of transistorized computers.
Challenges
Competition with IBM IBM was the dominant force in the computer industry and had a much larger sales and marketing organization. CDC had to work hard to differentiate itself and compete with IBM’s established market presence.
New Technology Transistorized computers were still a relatively new technology, and some customers may have been hesitant to adopt them. CDC had to educate potential customers about the benefits of transistors and overcome any skepticism about the reliability of this new technology.
Limited Software The software ecosystem for the 1604 was initially limited compared to more established IBM systems. This was a challenge, as customers needed software to make effective use of the machine. CDC and its users had to invest in developing software for the 1604.

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CDC 1604 Sales Table

Customer Number of Systems Delivery Date(s) Notes
US Navy ~25 1960-1964 The US Navy was the first and largest customer for the CDC 1604. Used for a variety of applications, including codebreaking, fleet operations analysis and scientific research. The NTDS (Naval Tactical Data System) was developed on the CDC 1604.
US Air Force Several 1961-1964 Used for various applications including scientific research and engineering.
NASA Several 1961-1964 Used for the Mercury and Gemini space programs, among other projects.
Universities ~10 1961-1964 Including the University of California, Berkeley, University of Illinois at Urbana-Champaign, and others. Used for scientific research.
Other Government Agencies Several 1961-1964 Including the National Bureau of Standards and other research organizations.
Industrial Customers A few 1962-1964 Including aerospace and engineering companies. Early adoption in the commercial sector.
International Customers A few 1962-1964 Including sales to Australia, Norway, and possibly others. Demonstrated some international interest in the 1604.
Totals ~50-60 1960-1964 A significant commercial success for CDC was establishing the company as a major player in the computer industry.

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Reasons for Success:

  • Price/Performance: The 1604 offered a compelling combination of performance and affordability compared to other computers of its time.
  • Transistorized Design: The use of transistors made the 1604 more reliable, smaller, and more power-efficient than vacuum-tube computers.
  • Seymour Cray’s Design: Seymour Cray’s innovative design and engineering expertise were instrumental in the 1604’s success.
  • Strong Government Sales: The US Navy’s large order provided a crucial early boost for CDC and the 1604.
  • Technical Sales Force: CDC had technically competent salespeople who could engage customers in detailed technical discussions.

Conclusion:

The CDC 1604 was a landmark machine that helped to launch Control Data Corporation as a major force in the computer industry. Its marketing effectively highlighted its performance, reliability, and affordability, while its sales success, particularly to the US Navy, demonstrated its practical value. The 1604 paved the way for CDC’s future supercomputers and solidified Seymour Cray’s reputation as a leading computer architect. Its sales, while modest by later standards, were a significant achievement for a new company challenging the dominance of IBM. The 1604’s impact on the computing landscape was substantial, marking an important step in the transition from vacuum tubes to transistors and setting the stage for the era of high-performance scientific computing.

 

CDC 6600 1964

The CDC 6600. Behind the system console are two “arms” of the plus-sign-shaped cabinet, with open covers. Individual modules can be seen inside. The racks holding the modules are hinged to give access to the racks behind them. Up to four racks were on each arm of the machine. On the right is the cooling system.

(Wiki Image By Jitze Couperus – Flickr: Supercomputer – The Beginnings, CC BY 2.0, https://commons.wikimedia.org/w/index.php?curid=19382150) 

 

CDC 6600 Circuits and Cycle Time table 

The CDC 6600, released in 1964, was a revolutionary supercomputer designed by Seymour Cray. It was significantly more advanced than the CDC 1604 and is considered by many to be the first true supercomputer. Here’s a table summarizing its circuits and cycle time:

Feature Details Impact and Significance
Circuit Technology
Transistors High-speed silicon NPN transistors: Specifically designed for the 6600, these transistors were faster than the germanium transistors used in the 1604. Packaged in flat packs with leads on opposite sides of the device. Enabled significantly faster switching speeds, contributing to the 6600’s remarkable performance. Allowed for much denser circuits. These were among the first silicon transistors used in a computer.
Diodes Semiconductor diodes: These are used in logic gates and other circuit functions. Complemented the transistors in implementing the 6600’s logic.
Resistors & Capacitors Discrete, smaller form factor components: Used for biasing, filtering, and timing circuits. They continued to play essential roles in circuit operation but were further miniaturized compared to previous generations.
Printed Circuit Boards (PCBs) Multilayer PCBs: Allowed for denser interconnections and more complex circuits. Enabled greater circuit density and reduced signal path lengths, contributing to faster operation. Multilayer boards were an important innovation that allowed for more complex and compact circuit designs.
Logic Design
Current Mode Logic (CML) Also known as Emitter-Coupled Logic (ECL): This logic family, though not strictly ECL, offered very high switching speeds by avoiding transistor saturation. One of the key factors in the 6600’s speed. CML/ECL circuits were faster than the logic used in the 1604, but also consumed more power and required careful design.
Boolean Algebra The foundation of logic design: The same underlying principles as those of previous computers. The fundamental mathematics of digital logic remained unchanged.
Synchronous Design Clock-driven operation: A central clock is used for synchronization, with a 100 ns major cycle and a 10 ns minor cycle within it. Provided predictable timing and simplified design. The 6600’s clocking system was more sophisticated than that of the 1604, reflecting the increased complexity of the machine.
Arithmetic Logic Unit (ALU) Multiple, specialized ALUs: The 6600 had separate functional units for different operations (e.g., floating-point add, multiply, divide, fixed-point add, and logical operations). Enabled a high degree of parallelism. Different operations could be performed concurrently by the independent functional units, significantly increasing performance.
Control Unit Highly sophisticated control unit: Managed the complex interplay of the multiple functional units, instruction pipeline, and memory system. A “scoreboard” was used to track instruction dependencies and resource availability. Orchestrated the parallel operation of the machine. The scoreboard was a key innovation that enabled efficient out-of-order execution of instructions, maximizing performance.
Cycle Time
Clock Speed 10 MHz (100 ns major cycle, 10 ns minor cycle). The minor cycle was used to control operations within the functional units. Much faster than the 1604’s clock speed. Enabled significantly faster execution of instructions. The 100 ns major cycle was broken down into ten 10 ns minor cycles.
Memory Cycle Time 1 µs (1000 ns) for a read/write cycle. 100 ns for read access. It used magnetic core memory but with a faster cycle time than the 1604. Multiple banks allowed accesses to be overlapped. Still relatively slow compared to the CPU but faster than the 1604’s memory. The 6600’s memory system used various techniques to mitigate the impact of the relatively slow memory access time.
Instruction Execution Time Highly variable, depending on instruction and resource availability: Difficult to give single numbers due to parallelism and out-of-order execution. The 6600 could execute instructions much faster than the 1604 on average, thanks to its advanced architecture.
* Add (fixed): 300 ns (3 minor cycles)
* Add (floating): 400 ns (4 minor cycles)
* Multiply: 1 µs (10 minor cycles)
* Divide: 2.9 µs (29 minor cycles) These are representative numbers. Instruction timing was complex due to the 6600’s parallel architecture.
Performance Enhancement
Pipelining Deep instruction pipeline: Instructions were fetched, decoded, and executed in an overlapped fashion, with multiple instructions in different stages of processing at the same time. Significantly increased instruction throughput. Allowed the 6600 to execute instructions at a much faster rate than would be possible with a non-pipelined architecture.
Parallelism Multiple independent functional units: Allowed for concurrent execution of different instructions. This was enabled by providing multiple, independent adders, multipliers, a divider, etc. A key innovation of the 6600. Enabled a high degree of parallelism, dramatically increasing performance. The functional units were specialized for different types of operations (e.g., floating-point, integer).
Out-of-Order Execution Scoreboard-controlled out-of-order execution: Instructions could be executed out of their original program order, as long as data dependencies were respected. Maximized utilization of the functional units. Allowed the 6600 to execute instructions as soon as their operands were ready and a functional unit was available, even if earlier instructions were still in progress.
Instruction Stack 8 word instruction stack The instruction stack held prefetched instructions. Reduced delays from memory access times. Instructions could be fetched from the stack rather than waiting for main memory. This contributed to the ability to issue an instruction every minor cycle.

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Key Takeaways:

  • Silicon Transistors and CML/ECL: The use of high-speed silicon transistors and CML/ECL circuits was fundamental to the 6600’s speed.
  • Aggressive Parallelism: The 6600’s multiple functional units and out-of-order execution capabilities enabled a level of parallelism that was unprecedented at the time.
  • Sophisticated Control: The scoreboard mechanism allowed for efficient management of instruction dependencies and resource allocation, maximizing the utilization of the parallel hardware.
  • Foundation for Modern Supercomputers: The CDC 6600’s architecture and design principles laid the groundwork for many subsequent generations of supercomputers and influenced the design of modern high-performance processors.

The CDC 6600 was a groundbreaking machine that redefined the state-of-the-art in high-performance computing. Its advanced circuits, innovative architecture, and sophisticated control mechanisms resulted in a level of performance that was an order of magnitude faster than its predecessors, solidifying its place as a true supercomputer and a milestone in the history of computing.

 

CDC 6600 Cooling, Packaging, and Interconnect table 

The CDC 6600’s advanced design and high performance presented significant challenges in terms of cooling, packaging, and interconnect. Seymour Cray and his team had to develop innovative solutions to address these challenges. Here’s a table summarizing these aspects:

Aspect Details Impact and Considerations
Cooling
Refrigerant Cooling Freon-based refrigeration system: Used a refrigerant (Freon) to cool the components. The coolant was circulated through cold plates attached to the chassis. This was a major departure from the air cooling used in previous computers. Essential for managing the heat generated by the high-speed circuits. Allowed for much denser packaging of components than would have been possible with air cooling. This was one of the first computers to use refrigerant cooling, and it was crucial to achieving the 6600’s performance.
Cold Plates Aluminum cold plates: Modules were mounted on these plates, which had channels for the Freon refrigerant to flow through, drawing heat away from the components. Provided efficient heat transfer from the components to the refrigerant. The design of the cold plates was critical for ensuring that all components were adequately cooled.
Heat Exchanger Large heat exchanger: Located outside the main computer unit, it transferred the heat absorbed by the Freon to an external cooling system (e.g., chilled water or a cooling tower). Allowed for continuous operation without overheating. The heat exchanger was a vital part of the cooling system, ensuring that the heat generated by the computer was effectively dissipated.
Packaging
Chassis and Modules Four-winged chassis (cross or plus shaped when viewed from above): Each wing housed multiple modules. Chassis were hinged. Modules contained the electronic components and were mounted on the cold plates. Provided a compact and organized structure for the computer. The modular design facilitated assembly, maintenance, and to some degree, cooling, since the chassis could be opened for access. The chassis also played an important role in the cooling system by providing a path for the refrigerant to flow.
Cordwood Modules High-density “cordwood” modules: Components were tightly packed into modules, with components perpendicular to the printed circuit board, maximizing component density. This was layered between two printed circuit boards. Enabled a high concentration of components in a small space. This was essential for achieving the 6600’s performance, but it also made cooling more challenging.
Printed Circuit Boards (PCBs) Six-layer PCBs: Used advanced (for the time) multilayer PCBs to interconnect components within each module. Allowed for complex and dense interconnections within the modules. Multilayer PCBs were crucial for routing the large number of signals required by the 6600’s complex circuitry.
Power Supplies High-current, low-voltage power supplies: Provided the power required by the transistorized circuits. Delivered the necessary power for the high-speed circuits. The power supplies had to be carefully designed to minimize noise and ensure the stable operation of the logic circuits.
Interconnect
PCB Traces Primary means of interconnection within modules: Copper traces on the multilayer PCBs connected components within each module. Provided high-density interconnections within modules. The design of the PCB traces was critical for ensuring signal integrity and minimizing delays.
Backplane Wiring Limited use of backplanes for inter-module communication: Connected modules within each chassis. Minimizing backplane wiring was a deliberate design choice that forced the designers to carefully consider functional partitioning. Reduced the complexity of the backplane wiring but placed greater emphasis on careful planning of module placement and interconnections. Backplane wiring could introduce delays and noise, so minimizing its use was beneficial for performance.
Coaxial Cables Used for high-speed signals between chassis and peripheral controllers: Provided impedance matching and shielding to minimize signal degradation and interference. Ensured reliable transmission of high-speed signals. Coaxial cables were essential for maintaining signal integrity over longer distances, particularly for communication with peripherals.
Twisted Pair Used for signals within the computer. The twisting helped in canceling out interference. Reduced interference between signals. This ensured that signals were not corrupted during transmission.

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Overall Challenges and Impact:

  • Thermal Management: The high density of components and the use of high-speed CML/ECL circuits generated significant heat, making cooling a major challenge. The Freon refrigeration system was a novel and essential solution.
  • Signal Integrity: The high clock speeds and dense packaging required careful attention to signal integrity. The use of multilayer PCBs, impedance-matched interconnections, and controlled signal paths was crucial.
  • Manufacturing Complexity: The dense packaging and complex interconnections made manufacturing the 6600 a challenging and expensive undertaking.
  • Reliability: Despite the challenges, the 6600 was remarkably reliable for its time, thanks to the use of transistors, rigorous testing, and careful design.

Legacy:

The CDC 6600’s innovations in cooling, packaging, and interconnect were essential to its success and had a lasting impact on the computer industry. The use of refrigerant cooling, high-density packaging, and advanced interconnect techniques became common practices in subsequent generations of high-performance computers. The 6600’s design pushed the boundaries of what was possible with the technology of its time and paved the way for the development of even more powerful supercomputers in the years to come. The solutions that came out of the 6600’s development, such as refrigerant cooling and the specific packaging techniques used, were critical in enabling the continued scaling of computer performance.

 

CDC 6600 Machine Design 

The CDC 6600 was a groundbreaking supercomputer that introduced many innovations in machine design. Its architecture, designed by Seymour Cray, was highly influential and set the standard for high-performance computing for many years. Here’s a detailed look at its key design elements:

  1. Architecture:
  • Central Processor (CP) and Peripheral Processors (PPs):
    • The 6600 had a fast central processor (CP) for computation and ten independent peripheral processors (PPs) for handling I/O and operating system tasks. This was a major innovation.
    • Each PP was a powerful computer in its own right, with its own memory.
    • This division of labor freed the CP to focus solely on computation, significantly improving overall system performance.
  • Word Length:
    • CP: 60-bit words. This large word size allowed for high precision in scientific calculations and efficient handling of data.
    • PPs: 12-bit words. This smaller word size was sufficient for the I/O and control tasks performed by the PPs.
  • Instruction Format:
    • CP: Instructions were either 15 bits or 30 bits long. This allowed for a compact representation of simple instructions while still providing the ability to specify complex operations when needed. Instructions could be packed 2, 3, or 4 to a word.
    • PP: Instructions were 12 bits long.
  • Registers (CP):
    • Eight 60-bit operand registers (X0-X7): Used for holding data values involved in calculations.
    • Eight 18-bit address registers (A0-A7): Used for holding memory addresses.
    • Eight 18-bit index registers (B0-B7): Used for address modification and loop control.
    • Clever Register Interlocking: Setting the value of an address register A1-A5 would automatically cause a load from that address into the corresponding X register. Similarly, setting A6 or A7 would cause a store from X6 or X7 to be stored in that memory address. Register A0 was not used for automatic loads and stores.
  • Memory Addressing (CP):
    • 18-bit addresses, allowing for a maximum of 262,144 words (256K) of 60-bit words in Central Memory (CM). In practice, the maximum configuration was 128K words.
  1. Memory:
  • Central Memory (CM):
    • Magnetic core memory.
    • Capacity: Up to 128K 60-bit words. (Later extended to 256K words with Extended Core Storage (ECS)).
    • Cycle time: 1 microsecond (µs) read/write, 100 ns access.
    • Organized into multiple independent banks (up to 32) that could be accessed in parallel, allowing for high memory bandwidth.
    • Banks were phased 100 ns apart. Accessing sequential addresses allowed the system to read or write a word every 100 ns.
  • Peripheral Processor Memory:
    • Each PP had its own 4K words of 12-bit magnetic core memory (4096 12-bit words).
    • Cycle time: 1 microsecond (µs).
  1. Input/Output (I/O):
  • Peripheral Processors (PPs): The ten PPs handled all I/O operations, freeing the CP from these tasks.
  • Data Channels: Each PP could control multiple I/O channels.
  • Direct Memory Access (DMA): PPs could transfer data directly to and from Central Memory without involving the CP.
  • Peripheral Devices: The 6600 supported a wide range of peripherals, including:
    • Magnetic tape drives (601, 607)
    • Disk drives (604, 606, 608, 6603, 854)
    • Card readers (405)
    • Card punches (415)
    • Line printers (400, 501, 505, 512)
    • Graphical displays (210, 250, 280, 282)
  1. Instruction Set (CP):
  • Reduced Instruction Set Computer (RISC) Philosophy: Although not strictly a RISC machine by today’s definition, the 6600 had a relatively small and simple instruction set compared to other computers of its time. This is a testament to Seymour Cray’s design skills.
  • Specialized Instructions: Included instructions optimized for scientific computing, such as floating-point arithmetic, vector operations, and population count (counting the number of 1 bits in a word).
  • Instruction Categories: Instructions were organized into categories based on their function, such as:
    • Load and Store
    • Fixed-point arithmetic
    • Floating-point arithmetic
    • Logical operations
    • Branching and control flow
    • Shift and mask operations
  1. Performance Enhancements:
  • Parallel Functional Units: The CP had multiple, independent functional units that could operate concurrently, including:
    • Floating-point adder
    • Two floating-point multipliers
    • Floating-point divider
    • Fixed-point adder
    • Incrementer (two units for address arithmetic)
    • Shifter
    • Boolean logic unit
    • Branch unit
  • Pipelining: Deep instruction pipeline with multiple stages (fetch, decode, execute, etc.) allowed for overlapping execution of instructions.
  • Out-of-Order Execution: The scoreboard mechanism enabled out-of-order execution of instructions, maximizing utilization of functional units and improving performance.
  • Instruction Stack: A hardware instruction stack (holding 8 60-bit words) allowed for prefetching of instructions, reducing delays due to memory access.
  • Memory Interleaving: Multiple memory banks allowed for overlapped memory accesses, increasing memory bandwidth.
  1. Physical Design:
  • High-Density Packaging: Used cordwood modules with components tightly packed together to minimize signal delays.
  • Freon Refrigeration: Employed a novel Freon-based refrigeration system to cool the high-speed circuits.
  • Plus-Shaped Chassis: Four wings, each housing module, are connected to a central core. This design facilitated cooling and minimized cable lengths.
  1. Software:
  • SIPROS (Simultaneous Processing Operating System): The first true timesharing operating system. Allowed multiple users to interact with the computer simultaneously. Also supported batch processing.
  • SCOPE (Supervisory Control Program): The main operating system used on the 6600. It was developed from SIPROS.
  • FORTRAN Compiler: CDC developed a highly optimized FORTRAN compiler that took advantage of the 6600’s parallel architecture.
  • COMPASS: The CDC 6600 assembly language.
  • ALGOL, COBOL, and Other Languages: Other high-level languages were also supported.

Impact and Legacy:

  • First True Supercomputer: The CDC 6600 is widely considered the first true supercomputer, achieving performance an order of magnitude faster than any other machine at the time.
  • Influence on Supercomputer Design: The 6600’s architecture, particularly its use of multiple functional units, pipelining, and out-of-order execution, heavily influenced the design of subsequent supercomputers.
  • Seymour Cray’s Genius: The 6600 solidified Seymour Cray’s reputation as the leading architect of supercomputers.
  • Advancement of Scientific Computing: The 6600 enabled scientists and engineers to tackle computational problems that were previously intractable, leading to significant advancements in fields such as weather forecasting, nuclear research, and aerospace engineering.

The CDC 6600 was a revolutionary machine that redefined high-performance computing. Its innovative design, advanced architecture, and exceptional performance made it a landmark achievement in the history of computing. It set new standards for speed and efficiency and paved the way for the development of even more powerful supercomputers in the decades that followed. The 6600’s influence can still be seen in the design of modern high-performance computers today.

 

CDC 6600 Software table

The CDC 6600 had a rich and influential software ecosystem that helped solidify its position as the leading supercomputer of its era. Here’s a table summarizing some of the key software developed for the CDC 6600:

Software Name/Type Description Significance
Operating Systems
SIPROS (Simultaneous Processing Operating System) The first true timesharing operating system. Developed at the same time as the hardware. Allowed multiple users to interact with the computer simultaneously through teletype terminals. Also supported batch processing. Ran on one of the Peripheral Processors. A major innovation for its time. Enabled more efficient use of the expensive supercomputer by allowing multiple users to share its resources. One of the first operating systems to demonstrate the feasibility and benefits of timesharing. Predecessor to SCOPE.
SCOPE (Supervisory Control Program) The primary operating system for the 6600 was developed from SIPROS. Provided job scheduling, resource management, I/O handling, and other system services. Managed the interaction between the CP and PPs. Ran on one of the Peripheral Processors. Enabled efficient use of the 6600’s resources and provided a platform for running user applications. Supported both batch processing and timesharing. Provided a more user-friendly environment than programming the machine directly in assembly language.
Compilers
FORTRAN (RUN compiler) A highly optimized FORTRAN compiler that took advantage of the 6600’s parallel architecture. Translated FORTRAN code (a high-level language popular for scientific programming) into 6600 machine code. Enabled scientists and engineers to program the 6600 in a relatively natural and productive way. The CDC FORTRAN compiler was renowned for its efficiency and helped establish FORTRAN as the dominant language for scientific computing on supercomputers.
FORTRAN (FTN compiler) An optimizing compiler that produced even faster and smaller code than the RUN compiler. Improved the RUN compiler by reducing memory usage and improving execution time.
ALGOL An ALGOL compiler. ALGOL was another high-level language, more popular in Europe, that was influential in the development of programming language theory. Provided an alternative high-level programming language for the 6600, though ALGOL never gained the same level of popularity in the US as FORTRAN.
COBOL A COBOL compiler. COBOL was a high-level language designed for business data processing. Allowed the 6600 to be used for business applications, although it was primarily used for scientific and engineering computations. Demonstrated the versatility of the machine.
Assemblers
COMPASS The primary assembler for the 6600. Translated assembly language code (a low-level, symbolic representation of machine instructions) into executable machine code for both the CP and the PPs. Provided programmers with fine-grained control over the 6600’s hardware. Essential for system programming, performance-critical applications, and developing other software tools like compilers and operating systems.
Utility Programs
Loaders Programs that loaded other programs and data into Central Memory and PP memory from various input devices (e.g., punched cards, magnetic tape). Essential for program execution. Allowed programs to be loaded and executed on the 6600.
Debuggers Tools that helped programmers find and fix errors in their programs. Allowed for inspection of memory, registers, and program execution flow. The dynamic display capabilities and interactive nature of the DDT debugger were innovative. Crucial for program development. Made the debugging process more efficient, particularly given the complexity of the 6600’s architecture.
Editors Text editors are used to create and modify source code and data files. Examples include EDIT, EDITS, and EDITC. These differed in their ability to handle various media, such as cards or disks. Improved the usability and productivity of programmers developing for the 6600.
Sort/Merge Utilities Programs for sorting and merging data files. Important for data processing applications.
Mathematical Libraries
Floating-Point Routines Library of subroutines for performing floating-point arithmetic operations, taking advantage of the 6600’s specialized floating-point hardware. Essential for scientific and engineering computations. Provided highly optimized routines for common floating-point operations.
Linear Algebra Routines Routines for performing matrix operations, such as matrix multiplication, inversion, and solving systems of linear equations. Widely used in scientific and engineering applications. Enabled efficient implementation of algorithms that relied on linear algebra.
Statistical Routines Subroutines for calculating statistical measures and performing statistical analysis. Facilitated data analysis and statistical research on the 6600.
Other Software
Chippewa Operating System A locally modified operating system is used at various CDC 6600 installations. Precursor to the later NOS and NOS/BE operating systems. Provided an alternative to SCOPE with additional features or customizations.
PERT/CPM Project management software based on the Program Evaluation and Review Technique (PERT) and Critical Path Method (CPM). One of the early examples of project management software is used for planning and scheduling complex projects.
APT Automatically Programmed Tools (APT) was a language used to program numerically controlled machine tools. Demonstrated the use of the 6600 in computer-aided manufacturing (CAM).
SIMSCRIPT A simulation language used for modeling and simulating complex systems. Enabled researchers to use the 6600 for discrete event simulation, a powerful tool for analyzing and understanding complex systems.

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Important Notes:

  • Early Supercomputer Software: The software ecosystem for the 6600, while advanced for its time, was still relatively primitive compared to modern operating systems and software development tools.
  • CDC’s Role: Control Data Corporation played a major role in developing much of the software for the 6600, including the operating systems, compilers, and many utility programs.
  • User Contributions: Users and user groups (such as the CDC user group and VIM) also significantly contributed to the 6600’s software library, developing and sharing specialized applications and tools.
  • FORTRAN’s Dominance: FORTRAN became the dominant programming language on the 6600, especially for scientific and engineering applications. CDC’s highly optimized FORTRAN compilers were a major factor in its popularity.

The software developed for the CDC 6600 was crucial to its success as a supercomputer. The availability of powerful operating systems like SIPROS and SCOPE, efficient compilers for languages like FORTRAN and COBOL, and a growing library of utility programs and mathematical routines made the 6600 a highly productive platform for scientific research, engineering design, and other computationally intensive tasks. The 6600’s software ecosystem helped to drive the adoption of supercomputers and laid the foundation for the development of more sophisticated software tools and applications in the years to come.

 

CDC 6600 Marketing table, Sales table

Let’s break down the marketing and sales of the CDC 6600, the machine that established Control Data Corporation as a major force in the supercomputer market and cemented Seymour Cray’s reputation as a leading architect.

CDC 6600 Marketing Table

Marketing Aspect Details Impact and Significance
Positioning
Unprecedented Performance Marketed as the fastest computer in the world by a wide margin, offering a revolutionary leap in computational power. Created a strong sense of excitement and positioned the 6600 as a game-changer in scientific computing.
Seymour Cray’s Design Emphasized Seymour Cray’s role as the lead architect, highlighting his innovative design and engineering expertise. Leveraged Cray’s growing reputation to build confidence and generate interest in the machine.
Scientific Focus Primarily targeted at scientific and engineering applications, emphasizing the machine’s ability to solve complex computational problems. Aligned with the needs of the target market and positioned the 6600 as an essential tool for scientific advancement.
Target Audience
National Laboratories The primary target was national laboratories involved in defense, energy, and scientific research (e.g., Los Alamos, Lawrence Livermore). These institutions had the most demanding computational needs and were the traditional early adopters of supercomputers.
Government Agencies Other government agencies with high-performance computing requirements, such as intelligence agencies and NASA. Similar to national labs, these agencies required powerful computers for their mission-critical applications.
Universities Targeted top research universities with strong programs in science and engineering. Universities played a key role in advancing computational science and training the next generation of researchers.
Emerging Commercial Markets While the initial focus was on scientific applications, CDC also began to explore commercial markets, such as the oil and gas industry. This marked the beginning of a broader adoption of supercomputers beyond government and academic research.
Marketing Channels
Industry Conferences CDC presented the 6600 at scientific and computing conferences, often demonstrating its capabilities with live demos. Generated excitement and provided a platform to showcase the machine’s performance to potential customers and the wider scientific community.
Technical Publications Papers and articles on the 6600’s architecture and performance were published in technical journals and conference proceedings. Disseminated technical information, established the 6600’s credentials, and contributed to the growing body of knowledge in computer architecture.
Direct Sales CDC employed a technically skilled sales force that engaged directly with potential customers, often working closely with them to understand their needs and demonstrate the 6600’s capabilities. This personalized approach was crucial for selling a complex and expensive product like the 6600. The sales force’s technical expertise helped build trust and demonstrate value.
Marketing Messages
Fastest Computer in the World This was the central message, emphasizing the 6600’s order-of-magnitude performance advantage over existing systems. Appealed to customers who prioritized performance above all else and created a strong sense of urgency to acquire the machine.
Innovative Architecture Highlighted the 6600’s unique architecture, including its multiple functional units, peripheral processors, and advanced instruction set. Positioned the 6600 as a major advancement in computer design and showcased CDC’s engineering prowess.
Seymour Cray’s Genius Emphasized Seymour Cray’s role as the visionary behind the 6600, reinforcing his reputation for designing groundbreaking machines. Capitalized on Cray’s growing fame and associated the 6600 with his innovative design philosophy.
Problem-Solving Capabilities Focused on how the 6600 could solve complex scientific and engineering problems that were previously intractable. Demonstrated the practical value of the machine and its ability to enable new areas of research and discovery.
Challenges
High Price The 6600 was very expensive (around $7-10 million), limiting its market to organizations with large budgets. This was a barrier to adoption for many potential customers, especially in the commercial sector.
New Architecture The 6600’s innovative architecture required software to be adapted or rewritten to take full advantage of its capabilities. This created a software development challenge and initially limited the availability of optimized applications.
Competition While the 6600 was initially the clear performance leader, it did face some competition from other vendors, such as IBM. This competition spurred continued innovation in the high-performance computing market.

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CDC 6600 Sales Table

Customer Number of Systems Delivery Date(s) Notes
Lawrence Livermore National Laboratory (LLNL) Several 1964-1969 LLNL was the first customer to receive a CDC 6600 and a major supporter of its development. Used for weapons research and other scientific applications.
Los Alamos National Laboratory (LANL) Several 1965-1969 Another major early adopter, also using the 6600 for weapons research and a wide range of scientific computations.
CERN (European Organization for Nuclear Research) 1 1965 One of the first international customers, demonstrating the global demand for the 6600’s performance. Used for high-energy physics research.
NASA Several 1965-1969 Used for aerospace research, space mission simulations, and other computationally intensive tasks.
National Security Agency (NSA) Several Classified Likely used for cryptanalysis and other intelligence applications. Details are classified.
Universities ~20 1965-1969 Including MIT, University of Texas at Austin, New York University, and others. Significant adoption in the academic community, reflecting the 6600’s impact on scientific research.
Other US Government Agencies Several 1965-1969 Including the US Weather Bureau and other research organizations.
Commercial Customers A few 1966-1969 Including Control Data’s own Data Centers and some early adoption in the oil and gas industry.
International Customers Several 1965-1969 Including customers in the UK, France, Norway, and Australia. Demonstrated the global reach of CDC.
Totals ~100-150 1964-1969 It was a major commercial success for the CDC and a landmark machine in the history of computing. Established CDC as a leading force in the supercomputer market.

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Reasons for Success:

  • Unprecedented Performance: The 6600 was significantly faster than any other computer available, offering an order-of-magnitude improvement in computational power.
  • Innovative Architecture: The 6600’s advanced architecture, with its multiple functional units and peripheral processors, was a major breakthrough in computer design.
  • Seymour Cray’s Design: Seymour Cray’s reputation as a leading computer architect gave customers confidence in the 6600’s capabilities.
  • Strong Marketing and Sales: CDC effectively marketed the 6600’s capabilities and built strong relationships with key customers in the scientific and government sectors.

Conclusion:

The CDC 6600 was a groundbreaking supercomputer that revolutionized high-performance computing. Its marketing and sales success established Control Data Corporation as a major player in the supercomputer market and cemented Seymour Cray’s reputation as a visionary designer. The 6600’s impact on scientific research and engineering was profound and long-lasting, and it paved the way for the development of even more powerful supercomputers in the years to come. Its sales figures, impressive for the time, demonstrate the strong demand for high-performance computing that existed even in the early days of the supercomputer era.

 

CDC 7600 1969

CDC 7600 assembly at LLNL

(Wiki Image By Berkeley Lab Computing Sciences – https://www.flickr.com/photos/nersc/51884327309/, CC BY 2.0, https://commons.wikimedia.org/w/index.php?curid=118968732) 

 

CDC 7600 Circuits and Cycle Time table 

The CDC 7600, introduced in 1969, was Seymour Cray’s successor to the CDC 6600. It maintained CDC’s dominance in the supercomputer market by delivering an even greater performance leap. Here’s a table summarizing its circuits and cycle time:

Feature Details Impact and Significance
Circuit Technology
Transistors Faster silicon NPN transistors than the 6600: Custom-designed and manufactured by Fairchild Semiconductor. Packaged in flat packs with leads on opposite sides of the device. Enabled even faster switching speeds, contributing to the 7600’s increased performance. Allowed for much denser circuits. These were among the fastest silicon transistors used in a computer at the time.
Diodes Semiconductor diodes: These are used in logic gates and other circuit functions. Complemented the transistors in implementing the 7600’s logic.
Resistors & Capacitors Discrete, smaller form factor components: Used for biasing, filtering, and timing circuits. They continued to play essential roles in circuit operation but were further miniaturized compared to previous generations.
Printed Circuit Boards (PCBs) Improved multilayer PCBs: Allowed for denser interconnections and more complex circuits. Up to 15 layers in a board. Enabled greater circuit density and reduced signal path lengths, contributing to faster operation. Multilayer boards were essential for managing the complexity of the 7600’s design.
Logic Design
Emitter-Coupled Logic (ECL) Used a faster variant of ECL than the 6600: ECL was known for its high speed but also high power consumption. One of the key factors in the 7600’s speed. ECL circuits were faster than the CML-like logic used in the 6600 but required even more careful thermal management.
Boolean Algebra Foundation of logic design: Same underlying principles as previous computers. The fundamental mathematics of digital logic remained unchanged.
Synchronous Design Clock-driven operation: Used a central clock for synchronization. The 7600 had a 27.5 ns clock cycle. Provided predictable timing and simplified design. The 7600’s clocking system was even more sophisticated than the 6600’s to manage the increased complexity and speed.
Arithmetic Logic Unit (ALU) Multiple, specialized ALUs: Similar to the 6600, the 7600 had separate functional units for different operations (e.g., floating-point add, multiply, divide, fixed-point add, logical operations). Enabled a high degree of parallelism. Different operations could be performed concurrently by the independent functional units, significantly increasing performance.
Control Unit Highly sophisticated control unit: Managed the complex interplay of the multiple functional units, instruction pipeline, and memory system. Used an improved instruction pipeline compared to the 6600. Orchestrated the parallel operation of the machine. The control unit was crucial for maximizing the utilization of the 7600’s resources and achieving its high performance.
Cycle Time
Clock Speed 36.4 MHz (27.5 ns clock cycle). Significantly faster than the 6600’s clock speed (which had a 100 ns major cycle). Enabled much faster execution of instructions.
Small Core Memory (SCM) Cycle Time 275 ns (ten clock cycles) for a read or write. Used as a fast cache-like memory for instructions and data. Reduced the effective memory access time. The SCM acted as a buffer between the CPU and the slower LCM, significantly improving performance.
Large Core Memory (LCM) Cycle Time 1760 ns (sixty-four clock cycles) for a read/write cycle. 275 ns (ten clock cycles) access time. Used as main memory. Much slower than the SCM but provided a larger capacity for data and instructions. The 7600’s memory hierarchy, with the SCM and LCM, was designed to balance speed and capacity.
Instruction Execution Time Highly variable, depending on instruction and resource availability: Difficult to give single numbers due to parallelism and pipelining. The 7600 generally executed instructions much faster than the 6600, thanks to its faster clock, improved pipeline, and memory hierarchy.
* Add: 55 ns (2 minor cycles)
* Multiply: 137.5 ns (5 minor cycles)
* Divide: 550 ns (20 minor cycles) These are approximations.
Performance Enhancement
Pipelining Deeper and more sophisticated instruction pipeline: The 7600 had a nine-stage instruction pipeline, allowing for greater overlap in instruction execution compared to the 6600. Increased instruction throughput. Enabled the 7600 to execute instructions at a much faster rate than would be possible with a non-pipelined architecture.
Parallelism Multiple independent functional units: Similar to the 6600 but with some functional units being replicated, allowing for even greater concurrency. Allowed for concurrent execution of different instructions. This parallelism, combined with the deep pipeline, was a key factor in the 7600’s performance.
Memory Hierarchy Two levels of memory: Small Core Memory (SCM) and Large Core Memory (LCM): SCM was faster but smaller, while LCM was slower but larger. This provided a balance between speed and capacity. Reduced the effective memory access time. The SCM acted as a cache, holding frequently used data and instructions, while the LCM provided the bulk storage.
Instruction Buffers Instruction buffers between SCM and the functional units: Helped to smooth out instruction fetching and reduce delays. Improved instruction fetch efficiency. The buffers helped to keep the pipeline full and minimize delays due to memory access.

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Key Takeaways:

  • Faster Transistors and ECL: The use of faster silicon transistors and ECL circuits was crucial to the 7600’s increased speed compared to the 6600.
  • Deeper Pipeline: The more sophisticated instruction pipeline allowed for greater overlap in instruction execution, significantly increasing throughput.
  • Memory Hierarchy: The two-level memory hierarchy (SCM and LCM) helped to bridge the speed gap between the fast CPU and the relatively slow main memory.
  • Evolutionary Design: The 7600 built upon the architectural innovations of the 6600, refining and extending them to achieve even higher performance.

The CDC 7600 was another triumph of supercomputer design by Seymour Cray and his team. It pushed the boundaries of performance even further than the 6600, solidifying CDC’s position as the leader in high-performance computing. The 7600’s advanced circuits, deeper pipeline, and sophisticated memory hierarchy made it the fastest computer in the world for several years and further influenced the design of future generations of supercomputers.

 

CDC 7600 Cooling, Packaging, and Interconnect table 

The CDC 7600, with its increased speed and circuit density compared to the 6600, presented even greater challenges in terms of cooling, packaging, and interconnect. Building on the experience gained from the 6600, Seymour Cray and his team refined their innovative solutions to address these challenges. Here’s a table summarizing these aspects:

Aspect Details Impact and Considerations
Cooling
Refrigerant Cooling Improved Freon-based refrigeration system: Similar to the 6600, the 7600 used a refrigerant (Freon) to cool the components. The system was refined and made more efficient. Essential for managing the even greater heat generated by the faster ECL circuits. Allowed for continued dense packaging of components. The use of refrigerant cooling remained a key differentiator for CDC’s supercomputers.
Cold Plates Redesigned aluminum cold plates: Modules were mounted on these plates, which had channels for the Freon refrigerant to flow through, drawing heat away from the components. Provided efficient heat transfer from the components to the refrigerant. The design of the cold plates was further optimized for the 7600’s specific layout and thermal requirements.
Heat Exchanger Larger and more efficient heat exchanger: Located outside the main computer unit, it transferred the heat absorbed by the Freon to an external cooling system (e.g., chilled water or a cooling tower). Allowed for continuous operation without overheating. The heat exchanger had to be scaled up to handle the increased thermal load of the 7600.
Packaging
Chassis and Modules Similar chassis design to the 6600, but larger: The 7600 had a large cylindrical chassis. Each section housed multiple modules. Modules contained the electronic components and were mounted on the cold plates. Provided a compact and organized structure for the computer. The modular design facilitated assembly, maintenance. The chassis also played an important role in the cooling system by providing a path for the refrigerant to flow.
Cordwood Modules Refined cordwood modules: Components were still tightly packed into modules in a cordwood fashion, but with even greater density than the 6600. This was layered between two printed circuit boards. Enabled an even higher concentration of components in a small space. This was essential for achieving the 7600’s performance, but it also made cooling even more critical.
Printed Circuit Boards (PCBs) Up to 15-layer PCBs: Used advanced multilayer PCBs to interconnect components within each module, as well as provide power and ground to the components on the module. Allowed for very complex and dense interconnections within the modules. Multilayer PCBs were crucial for routing the large number of signals required by the 7600’s complex circuitry, as well as providing appropriate power to those circuits.
Power Supplies Higher-current, low-voltage power supplies: Provided the power required by the faster, more power-hungry ECL circuits. Delivered the necessary power for the high-speed circuits. The power supplies had to be carefully designed to minimize noise and ensure stable operation of the logic circuits. Power distribution also became more of a challenge with each generation of computer.
Interconnect
PCB Traces Primary means of interconnection within modules: Copper traces on the multilayer PCBs connected components within each module. Provided high-density interconnections within modules. The design of the PCB traces was critical for ensuring signal integrity and minimizing delays. The increased speed and complexity of the 7600 required even more careful attention to trace routing and impedance matching.
Backplane Wiring Used for inter-module communication: Connected modules within each chassis. Wire-wrap was used to make the connections on the backplane. Provided a standardized way to connect modules. Backplane wiring could introduce delays and noise so careful attention was paid to the layout and routing of these wires.
Coaxial Cables Used for high-speed signals between chassis and peripheral controllers, and internally within the machine: Provided impedance matching and shielding to minimize signal degradation and interference. Ensured reliable transmission of high-speed signals. Coaxial cables were essential for maintaining signal integrity over longer distances. The 7600 used coaxial cables more extensively than the 6600, reflecting the increased importance of signal integrity at higher speeds.
Twisted Pair Used for signals within the computer. The twisting helped in canceling out interference. Reduced interference between signals. This ensured that signals were not corrupted during transmission. The 7600 made extensive use of twisted pair cables to manage signal integrity within the increasingly complex system.

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Overall Challenges and Impact:

  • Thermal Management: The increased speed and circuit density of the 7600 generated even more heat than the 6600, making cooling an even greater challenge. The refined Freon refrigeration system was essential to the 7600’s operation.
  • Signal Integrity: The faster clock speeds and denser packaging required even more careful attention to signal integrity. The use of improved multilayer PCBs, impedance-matched interconnections, and controlled signal paths was crucial.
  • Manufacturing Complexity: The 7600’s design pushed the limits of manufacturing technology of the time. The dense packaging, complex interconnects, and sophisticated cooling system required advanced manufacturing techniques and rigorous quality control.
  • Reliability: Despite the increased complexity, the 7600 maintained a good level of reliability, thanks to the use of high-quality components, careful design, and extensive testing.

Legacy:

The CDC 7600’s advancements in cooling, packaging, and interconnect were essential to its success and further solidified CDC’s leadership in the supercomputer market. The techniques pioneered in the 7600, such as the use of refined refrigerant cooling, even higher-density packaging, and more sophisticated interconnect strategies, continued to influence the design of high-performance computers for many years. The 7600’s design pushed the boundaries of what was possible with the technology available at the time and paved the way for the development of even more powerful supercomputers in the decades that followed. Its innovations in thermal management, in particular, remain relevant in today’s high-performance computing landscape.

 

CDC 7600 Machine Design 

The CDC 7600, designed by Seymour Cray and introduced in 1969, was a landmark supercomputer that built upon the innovations of the CDC 6600 and further extended the boundaries of high-performance computing. Here’s a detailed look at its key design elements:

  1. Architecture:
  • Instruction Set Compatibility: The 7600 maintained upward instruction set compatibility with the 6600, meaning it could run programs written for the 6600 without modification. This was a major advantage for users upgrading from the 6600.
  • Central Processor (CP) and Input/Output: Unlike the 6600’s Peripheral Processors, the 7600 did not have separate processors dedicated to I/O. Instead, I/O was performed by the main CPU or by external specialized controllers. The 7600 was intended to be part of a larger system where a 6600 or other front-end computer would handle these tasks.
  • Word Length:
    • CP: 60-bit words (same as the 6600).
    • The 7600 did not use Peripheral Processors.
  • Instruction Format:
    • CP: Instructions were either 15 bits or 30 bits long (same as the 6600).
  • Registers (CP):
    • Eight 60-bit operand registers (X0-X7): Used for holding data values involved in calculations.
    • Eight 18-bit address registers (A0-A7): Used for holding memory addresses.
    • Eight 18-bit index registers (B0-B7): Used for address modification and loop control.
    • Register Interlocking: Similar to the 6600, setting the value of an address register A1-A5 would automatically cause a load from that address into the corresponding X register. Setting A6 or A7 would cause a store from X6 or X7 to be stored in that memory address.
  1. Memory:
  • Small Core Memory (SCM):
    • Magnetic core memory.
    • Capacity: 65,536 words (64K) of 60-bit words.
    • Cycle time: 275 ns (ten clock cycles).
    • Served as a fast cache-like memory for instructions and data, similar to an instruction/data cache in modern processors.
  • Large Core Memory (LCM):
    • Magnetic core memory.
    • Capacity: 512K 60-bit words.
    • Cycle time: 1760 ns (sixty-four clock cycles) with 275 ns access time.
    • Used as main memory, providing a larger but slower storage space compared to the SCM.
  • Memory Interleaving: Both SCM and LCM were highly interleaved, allowing for multiple memory accesses to be in progress simultaneously. This significantly increased the effective memory bandwidth.
  • Memory Hierarchy: The combination of SCM and LCM created a two-level memory hierarchy that balanced speed and capacity, a key innovation that improved performance.
  1. Input/Output (I/O):
  • Channel Couplers: The 7600 used specialized I/O units called channel couplers to interface with peripheral devices. These were not full processors like the 6600’s PPs but rather sophisticated controllers.
  • Direct Memory Access (DMA): Channel couplers could transfer data directly to and from both SCM and LCM without involving the CP, similar to the 6600’s PPs.
  • Peripheral Devices: The 7600 was typically connected to a 6000 series machine (like a 6600 or 6400) that would act as a front end. That machine would handle peripherals such as:
    • Magnetic tape drives
    • Disk drives
    • Card readers
    • Line printers
  1. Instruction Set:
  • Upward Compatibility: The 7600’s instruction set was largely a superset of the 6600’s, ensuring that programs written for the 6600 could run on the 7600.
  • New Instructions: The 7600 added some new instructions to take advantage of its enhanced hardware features.
  • Vector Operations: While not a true vector processor, the 7600 had instructions that could operate on multiple data elements in a single instruction, providing a limited form of vector processing.
  1. Performance Enhancements:
  • Faster Clock Speed: The 7600 had a clock speed of 36.4 MHz (27.5 ns clock cycle), significantly faster than the 6600’s 10 MHz (with a 100 ns major cycle).
  • Emitter-Coupled Logic (ECL): Used a faster variant of ECL circuits compared to the 6600, enabling faster switching speeds.
  • Deeper Pipeline: The 7600 had a nine-stage instruction pipeline, allowing for greater overlap in instruction execution than the 6600.
  • Parallel Functional Units: Like the 6600, the 7600 had multiple, independent functional units that could operate concurrently. Some units were replicated for even greater parallelism. These included:
    • Floating-point add
    • Two floating-point multipliers
    • Floating-point divide
    • Fixed-point add
    • Increment (two units)
    • Shift
    • Boolean
    • Population count / Leading zero count
    • Normalize
  • Memory Hierarchy: The two-level memory hierarchy (SCM and LCM) significantly reduced the effective memory access time.
  • Instruction Buffers: Instruction buffers between the SCM and the functional units helped smooth out instruction fetching and reduce delays.
  1. Physical Design:
  • High-Density Packaging: Continued the use of cordwood modules with even greater component density than the 6600.
  • Freon Refrigeration: Employed a refined Freon-based refrigeration system to cool the faster, more power-hungry ECL circuits.
  • Cylindrical Chassis: The 7600 had a large cylindrical chassis, housing the modules and the cooling system.
  1. Software:
  • LTSS (Livermore Time-Sharing System): One of the primary operating systems used on the 7600, developed at Lawrence Livermore National Laboratory.
  • SCOPE (Supervisory Control Program): A version of the 6600’s SCOPE operating system was also adapted for the 7600.
  • NOS (Network Operating System) and NOS/BE (Network Operating System/Batch Environment): These operating systems became more prominent toward the end of the 7600’s lifespan and were used more widely on its successor, the CDC Cyber series.
  • FORTRAN Compilers: CDC continued to develop highly optimized FORTRAN compilers for the 7600, taking advantage of its hardware features.
  • Other Languages: ALGOL, and to a lesser extent, COBOL were supported.
  • Assembly Language (COMPASS): Programmers could write in assembly language for maximum control and performance.

Impact and Legacy:

  • Supercomputer Dominance: The CDC 7600 was the fastest computer in the world for several years, further solidifying CDC’s leadership in the supercomputer market.
  • Influence on Supercomputer Design: The 7600’s architecture, particularly its deep pipeline, memory hierarchy, and use of ECL circuits, influenced the design of many subsequent supercomputers.
  • Seymour Cray’s Continued Success: The 7600 cemented Seymour Cray’s status as the preeminent supercomputer designer.
  • Advancement of Scientific Computing: The 7600 enabled scientists and engineers to tackle even more complex computational problems, leading to advancements in fields such as nuclear weapons research, weather forecasting, and aerospace engineering.

The CDC 7600 was a remarkable feat of engineering that pushed the boundaries of high-performance computing. Its innovative design, advanced technology, and exceptional performance made it a highly influential machine that shaped the evolution of supercomputers for many years to come. It represented the pinnacle of CDC’s 6000 series architecture and demonstrated the continued viability of highly specialized, performance-focused designs in the face of increasing competition from more general-purpose computers.

 

CDC 7600 Software table

The CDC 7600, while primarily known for its groundbreaking hardware, also had a software ecosystem that enabled its users to harness its immense power. Here’s a table summarizing some of the key software developed for the CDC 7600:

Software Name/Type Description Significance
Operating Systems
LTSS (Livermore Time-Sharing System) A powerful time-sharing operating system developed at Lawrence Livermore National Laboratory specifically for the CDC 7600 (and later adapted for the CDC STAR-100). Provided interactive access for multiple users. One of the most advanced time-sharing systems of its era. Allowed multiple users to efficiently utilize the 7600’s resources. Enabled interactive program development and execution, which was a significant improvement over batch processing for many applications.
SCOPE (Supervisory Control Program) A modified version of the CDC 6600’s operating system adapted for the 7600. Primarily used for batch processing. Provided a familiar environment for users migrating from the 6600. Supported the large number of existing batch applications developed for the CDC 6000 series.
NOS (Network Operating System) This operating system was introduced later in the 7600’s life, and became more prominent on the successor CDC Cyber systems. It was designed to support both interactive and batch processing and offered improved networking capabilities. Reflected the growing importance of networking and interactive computing. NOS and its variants became the standard operating systems for CDC’s later machines.
NOS/BE (Network Operating System/Batch Environment) A batch-oriented operating system that evolved from SCOPE and was used on the 7600 and later CDC Cyber systems. Provided a robust environment for running large batch jobs, which remained important for many scientific and engineering applications.
Compilers
FORTRAN (FTN and RUN) Highly optimized FORTRAN compilers that took advantage of the 7600’s architecture, including its pipeline and memory hierarchy. FTN was a more advanced optimizing compiler, while RUN was an earlier, more established compiler. FORTRAN remained the dominant language for scientific and engineering programming. CDC’s FORTRAN compilers were renowned for their performance and helped users achieve maximum efficiency on the 7600.
LRLTRAN A variant of FORTRAN developed at Lawrence Livermore National Laboratory. Included extensions for vector processing and other features tailored to high-performance computing. Allowed programmers to exploit the 7600’s capabilities more effectively for specific types of applications. Demonstrated the close relationship between hardware and software development at national laboratories.
ALGOL An ALGOL compiler. ALGOL was a high-level language that was more popular in Europe but had a significant influence on programming language design. Provided an alternative high-level language option, although ALGOL never gained widespread adoption in the US.
Assemblers
COMPASS The primary assembler for the 7600. Translated assembly language code (a low-level, symbolic representation of machine instructions) into executable machine code. Provided programmers with fine-grained control over the 7600’s hardware. Essential for system programming, performance-critical applications, and for developing other software tools.
Utility Programs
Loaders Programs that loaded other programs and data into SCM and LCM from various input devices (often from a front-end 6000 series machine). Essential for program execution. Allowed programs to be loaded and executed on the 7600.
Debuggers Tools that helped programmers find and fix errors in their programs. Allowed for inspection of memory, registers, and program execution flow. Crucial for program development. Debugging on a complex machine like the 7600 could be challenging, and these tools made the process more efficient.
Editors Text editors for creating and modifying source code and data files. Facilitated program development by allowing programmers to easily create and edit their code.
Mathematical Libraries
Floating-Point Routines Library of subroutines for performing floating-point arithmetic operations, optimized for the 7600’s hardware. Essential for scientific and engineering computations. Provided highly optimized routines for common floating-point operations, taking advantage of the 7600’s specialized floating-point units.
Linear Algebra Routines Routines for performing matrix operations, such as matrix multiplication, inversion, and solving systems of linear equations. Optimized for the 7600’s architecture. Widely used in scientific and engineering applications. Enabled efficient implementation of algorithms that relied on linear algebra. The 7600’s performance made it particularly well-suited for these types of computations.
Applications
Nuclear Weapons Simulation The 7600 was used extensively at national laboratories for simulating nuclear weapons, a computationally demanding task that required the fastest computers available. One of the primary drivers for the development of supercomputers like the 7600. These simulations were critical for national security and scientific understanding of nuclear processes.
Weather Forecasting The 7600 was used for weather modeling and prediction, enabling more accurate and timely forecasts. Demonstrated the practical benefits of supercomputing for improving weather prediction, which has significant societal and economic impacts.
Fluid Dynamics The 7600 was used to simulate fluid flow, with applications in aerospace engineering, hydrodynamics, and other fields. Enabled engineers and scientists to study complex fluid dynamics problems that were previously intractable.
Structural Analysis The 7600 was used to analyze the structural integrity of buildings, bridges, and other structures. Allowed for more sophisticated and accurate structural analysis, leading to safer and more efficient designs.

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Important Notes:

  • Specialized Software: Much of the software developed for the 7600 was highly specialized and tailored to the needs of specific scientific and engineering applications.
  • National Laboratories’ Influence: National laboratories like Lawrence Livermore played a major role in developing software for the 7600, including the LTSS operating system and specialized libraries.
  • FORTRAN’s Continued Dominance: FORTRAN remained the primary programming language used on the 7600, reflecting its importance in scientific and engineering computing.
  • Shift from 6600: While some 6600 software could run on the 7600, taking full advantage of the 7600’s increased performance often required code modifications or the use of software specifically designed for the 7600.

The software developed for the CDC 7600 was essential to its success as a supercomputer. The availability of powerful operating systems like LTSS, highly optimized FORTRAN compilers, and specialized libraries for scientific and engineering applications enabled users to harness the 7600’s immense computational power. The 7600’s software ecosystem helped to advance the field of high-performance computing and paved the way for the development of even more sophisticated software tools and applications in the years to come.

 

CDC 7600 Marketing table, Sales table

Let’s create separate marketing and sales tables for the CDC 7600, a powerful supercomputer that preceded the Cray-1 and represented a significant step forward in high-performance computing.

CDC 7600 Marketing Table

Marketing Aspect Details Impact and Significance
Positioning
Performance Leadership Marketed as the most powerful computer in the world, significantly faster than its predecessor, the CDC 6600, and any other existing system. This claim of performance leadership was a major draw for customers who needed the absolute best in computing power.
Evolutionary Design Positioned as a refinement and enhancement of the successful CDC 6600 architecture, offering improved performance and reliability while maintaining software compatibility. This reassured existing CDC customers that the 7600 was a logical and relatively low-risk upgrade path.
Seymour Cray’s Design Although Seymour Cray had less direct involvement in the 7600 compared to the 6600, his association with the project and CDC’s overall design philosophy were still emphasized. Cray’s reputation as a leading supercomputer designer added credibility and prestige to the 7600.
Target Audience
Existing CDC 6600 Customers Primarily targeted users of the CDC 6600 who needed a performance boost but wanted to retain compatibility with their existing software. This was a natural upgrade path for many customers and helped CDC maintain its customer base.
National Laboratories National laboratories involved in defense, energy, and scientific research were a key target market, as they had traditionally been major users of CDC supercomputers. These institutions had the most demanding computational needs and were willing to invest in the highest-performing systems available.
Government Agencies Other government agencies with high-performance computing requirements, such as intelligence agencies and NASA. Similar to national labs, these agencies required powerful computers for their mission-critical applications.
Universities A select few top research universities with strong programs in science and engineering. Universities played a role in advancing computational science, although their adoption of the 7600 was limited by its high cost.
Marketing Channels
Industry Conferences CDC presented the 7600 at scientific and computing conferences. Provided visibility and a platform to showcase the machine’s capabilities to potential customers and the wider high-performance computing community.
Technical Publications Papers and articles on the 7600’s architecture and performance were published in technical journals and conference proceedings. Disseminated technical information and helped to establish the 7600’s credentials as a major advancement in computer architecture.
Direct Sales CDC employed a technically skilled sales force that engaged directly with potential customers, often working closely with them to understand their needs and demonstrate the 7600’s capabilities. This personalized approach was essential for selling a complex and expensive product like the 7600. The sales force’s technical expertise was crucial for effectively communicating the machine’s value proposition.
Marketing Messages
Fastest Computer in the World Emphasized the 7600’s unparalleled speed and performance, claiming it to be the most powerful computer available. Appealed to customers who prioritized performance above all else.
Enhanced 6600 Architecture Highlighted the 7600’s evolutionary design, building upon the strengths of the successful CDC 6600 while offering significant performance improvements. Reassured existing CDC customers that the 7600 was a reliable and compatible upgrade path.
Increased Reliability Promoted the 7600’s improved reliability compared to the 6600, thanks to advancements in circuit technology and design. Addressed a key concern for customers who relied on their supercomputers for critical applications.
Software Compatibility Emphasized the 7600’s software compatibility with the 6600, allowing users to run their existing software without significant modifications. This reduced the cost and effort required for customers to transition to the 7600 and protected their investment in software development.
Challenges
High Price The CDC 7600 was an extremely expensive machine, limiting its market to organizations with very large budgets. This was a barrier to adoption for many potential customers, especially in the commercial sector.
Competition While the 7600 was initially the clear performance leader, it did face competition from other vendors, such as IBM. This competition spurred continued innovation in the supercomputer market.
Development Delays The 7600 experienced some development delays, which allowed competitors to gain ground. This কিছুটা tarnished the 7600’s image and may have led some customers to consider alternatives.

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CDC 7600 Sales Table

Customer Number of Systems Delivery Date(s) Notes
Lawrence Livermore National Laboratory (LLNL) Several 1969-1975 LLNL was a major CDC customer and one of the first to acquire 7600 systems. They were used for a variety of scientific applications, including weapons research.
Los Alamos National Laboratory (LANL) Several 1970-1975 LANL was another major CDC customer and used the 7600 for similar applications as LLNL.
NASA Several 1970-1975 Used for aerospace research and other computationally intensive tasks.
National Security Agency (NSA) At least 1 Classified Likely used for cryptanalysis and other intelligence applications. Details are classified.
Various Universities A few 1970-1975 Including the University of California, Berkeley, and the University of Illinois at Urbana-Champaign. Limited adoption due to the high cost.
Other US Government Agencies Several 1970-1975 Including the Department of Defense and other research organizations.
International Customers Several 1970-1975 Including customers in Europe and possibly Japan. Demonstrated the global reach of CDC.
Totals ~60-80 1969-1975 A commercial success for CDC, although not as widely adopted as the 6600. Established CDC as the dominant vendor in the high-performance computing market for a time.

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Reasons for Success:

  • Performance Leadership: The 7600 was significantly faster than any other computer at the time of its introduction.
  • Evolutionary Design: The 7600 built upon the successful architecture of the 6600, offering a relatively smooth upgrade path for existing customers.
  • Strong Customer Base: CDC had a strong installed base of 6600 customers, many of whom were natural candidates for the 7600.
  • Seymour Cray’s Influence: Although Cray’s direct involvement was less than with the 6600, his design philosophy and reputation still played a role in the 7600’s success.

Conclusion:

The CDC 7600 was a highly successful supercomputer that solidified CDC’s position as the leader in the high-performance computing market during the early 1970s. Its marketing effectively emphasized its performance leadership, evolutionary design, and software compatibility with the 6600. While its high cost limited its market somewhat, the 7600 found a strong customer base among national laboratories, government agencies, and a few universities. The 7600’s sales figures, while lower than the 6600’s, were still impressive and demonstrated the continued demand for ever-faster supercomputers. The 7600 played a crucial role in advancing computational science and engineering and paved the way for the even more powerful supercomputers that followed, including the Cray-1.

 

CDC 8600 1972 Cancelled

CDC 8600 Cancelled explanation 

The CDC 8600 was a planned supercomputer designed by Seymour Cray at Control Data Corporation (CDC). It was intended to be the successor to the CDC 7600 and a significant leap forward in computing power. However, the project was ultimately canceled. While the exact reasons are complex and multifaceted, several key factors contributed to its demise:

  • Technical Challenges: The 8600 pushed the boundaries of technology at the time. Cray was known for his innovative and often risky designs. The 8600 faced significant technical hurdles, particularly in developing the dense, high-speed circuitry required to achieve its performance goals. These challenges likely led to delays and cost overruns.
  • Market Conditions: The supercomputer market was (and is) a niche market. Given the technical difficulties, the CDC may have reassessed the potential return on investment for such an ambitious and expensive project. Economic conditions at the time may also have played a role.nagement Changes: Changes in management or internal priorities within the CDC could have also contributed to the cancellation. Sometimes, even promising projects are shelved due to shifting strategic goals or budget reallocations.
  • Competition: The supercomputer market was becoming increasingly competitive. Other companies were developing their high-performance machines, and CDC may have felt pressure to accelerate development or reconsider its approach.
  • Seymour Cray’s Departure: While not the sole reason, Seymour Cray left CDC in 1972 to found Cray Research. While he continued to consult on the 8600 for a time, his departure undoubtedly impacted the project. His vision and leadership were crucial to its development.

In short, the cancellation of the CDC 8600 was likely caused by a combination of technical difficulties, market realities, internal factors, and the departure of its chief architect. This serves as a reminder that even the most promising technological endeavors can be derailed by a complex interplay of circumstances.

 

Cray-1 1976

A Cray-1 on display at the Science Museum in London

(Wiki Image By Irid Escent – 20180227_132902, CC BY-SA 2.0, https://commons.wikimedia.org/w/index.php?curid=85791445) 

 

Cray-1 Circuits and Cycle Time table 

The Cray-1, introduced in 1976, was Seymour Cray’s first supercomputer after leaving CDC and founding Cray Research. It was a groundbreaking machine that popularized vector processing and set new standards for performance. Here’s a table summarizing its circuits and cycle time:

Feature Details Impact and Significance
Circuit Technology
Transistors High-speed ECL bipolar transistors: ECL (Emitter-Coupled Logic) was known for its very fast switching speeds and high power consumption. The Cray-1 used a more advanced and compact form of ECL compared to the CDC 7600. Enabled extremely fast clock speeds, a key factor in the Cray-1’s performance. ECL was the fastest logic family available at the time, but it required careful thermal management.
Integrated Circuits (ICs) First Cray machine to make extensive use of integrated circuits: The Cray-1 used integrated circuits for its logic gates. Each IC contained only two gates. These came in two forms: a five-input NAND gate and a four-input NAND gate. Allowed for greater circuit density and reduced signal delays compared to discrete transistors. The use of ICs, although simple by later standards, was a significant step forward for Cray’s designs.
Resistors Discrete resistors: Used for biasing and other circuit functions. Integrated resistors were not used. Played essential roles in circuit operation, although their form factors were shrinking with each generation of technology.
Printed Circuit Boards (PCBs) Five-layer PCBs: Allowed for dense interconnections between the ICs. Enabled complex and compact circuit layouts, contributing to the Cray-1’s speed and relatively small size. Multilayer PCBs were essential for managing the complexity of the Cray-1’s design.
Logic Design
Emitter-Coupled Logic (ECL) Used ECL throughout the system for both logic and memory circuits. Provided very high switching speeds, crucial for achieving the Cray-1’s performance. ECL’s speed came at the cost of high power consumption, which necessitated the Cray-1’s sophisticated cooling system.
Boolean Algebra Foundation of logic design: Same underlying principles as previous computers. The fundamental mathematics of digital logic remained unchanged.
Synchronous Design Clock-driven operation: Used a single 12.5 ns clock cycle. Provided predictable timing and simplified design. The Cray-1’s clocking system was highly optimized for speed.
Vector Processing Introduced vector registers and functional units: Allowed the CPU to perform the same operation on multiple data elements (a vector) simultaneously. A major innovation that significantly improved performance for scientific and engineering applications. Vector processing has become a defining characteristic of supercomputers for many years.
Scalar Processing Also included scalar registers and functional units for general-purpose processing. Provided flexibility for handling code that could not be vectorized. The Cray-1 was designed to be a powerful general-purpose computer, not just a specialized vector processor.
Cycle Time
Clock Speed 80 MHz (12.5 ns clock cycle). Extremely fast for its time, significantly faster than the CDC 7600. The fast clock speed was a key factor in the Cray-1’s performance.
Memory Cycle Time 50 ns (four clock cycles) for a read or write. Used bipolar semiconductor memory (RAM), which was much faster than core memory. Fast memory access was crucial for keeping the vector pipelines fed with data. The Cray-1’s memory system was designed to provide high bandwidth and low latency.
Instruction Execution Time Variable, depending on instruction and whether it was scalar or vector: Vector instructions could achieve significantly higher throughput than scalar instructions. The Cray-1’s performance was highly dependent on the ability to vectorize code.
* Scalar Add: 12.5 ns (1 clock cycle)
* Vector Add: Effectively 1 result per clock cycle (after pipeline fill)
* Vector Multiply: Effectively 1 result per clock cycle (after pipeline fill) These numbers are illustrative.
Performance Enhancement
Vector Processing The primary performance enhancement: Allowed for significant speedups on code that could be expressed in terms of vector operations. Revolutionized high-performance computing. Vector processing became a standard feature of supercomputers and greatly influenced the development of scientific software.
Pipelining Deeply pipelined functional units: Both scalar and vector functional units were pipelined, allowing for overlapped execution of instructions. Increased instruction throughput. Pipelining was essential for achieving high performance in both scalar and vector operations.
Chaining Vector chaining: Allowed the results of one vector operation to be fed directly into another vector operation without having to be stored back in memory first. Reduced memory accesses and improved performance. Chaining was a key optimization for vector processing that minimized delays between dependent operations.
Memory Interleaving Multiple independent memory banks: Allowed for simultaneous memory accesses, increasing memory bandwidth. Reduced memory access latency and improved overall system performance. Memory interleaving was crucial for keeping the vector pipelines supplied with data.

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Key Takeaways:

  • ECL and Integrated Circuits: The use of ECL ICs was key to the Cray-1’s speed, enabling a very fast clock cycle.
  • Vector Processing: The introduction of vector registers and functional units revolutionized high-performance computing and significantly improved performance for many scientific applications.
  • Balanced Design: The Cray-1 was a balanced design, with a fast CPU, a fast memory system, and a sophisticated cooling system, all working together to deliver unprecedented performance.
  • Foundation for Future Cray Supercomputers: The Cray-1 established Cray Research as the leader in the supercomputer market and laid the foundation for future generations of Cray supercomputers.

The Cray-1 was a landmark machine that redefined the supercomputer industry. Its innovative architecture, advanced circuit technology, and sophisticated performance optimizations made it the fastest computer in the world for many years. It popularized vector processing, which became a dominant paradigm in high-performance computing for decades. The Cray-1’s legacy continues to influence the design of high-performance computers today.

 

Cray-1 Cooling, Packaging, and Interconnect table 

The Cray-1, with its high-speed ECL circuits and dense packaging, generated a significant amount of heat. To address this challenge, Seymour Cray and his team developed a highly innovative and effective cooling system. The packaging and interconnect technologies were also crucial to the Cray-1’s performance and iconic design. Here’s a table summarizing these aspects:

Aspect Details Impact and Considerations
Cooling
Refrigerant Cooling Freon-based refrigeration system: Similar to the CDC 6600 and 7600, the Cray-1 used a refrigerant (Freon) to cool the components. The system was integrated into the Cray-1’s iconic C-shaped chassis. Essential for managing the heat generated by the high-speed ECL circuits. Allowed for much denser packaging than would be possible with air cooling. The use of refrigerant cooling became a signature feature of Cray supercomputers.
Cold Bars Vertical aluminum cold bars: Modules were mounted to these bars, which contained channels for the Freon refrigerant to flow through, drawing heat away from the components. Provided efficient heat transfer from the components to the refrigerant. The cold bars were a key innovation in the Cray-1’s cooling system, allowing for direct cooling of the modules.
Heat Exchanger Integrated heat exchanger at the base of the chassis: Transferred the heat absorbed by the Freon to an external cooling system (typically chilled water). Allowed for continuous operation without overheating. The integrated heat exchanger contributed to the Cray-1’s compact and visually striking design.
Packaging
C-Shaped Chassis Iconic C-shaped chassis: The Cray-1’s distinctive shape was not just for aesthetics. It minimized wire lengths and provided space for the cooling system at the base. The central portion of each column contained the power supplies. Reduced signal delays and contributed to the machine’s overall performance. The C-shape also became an iconic symbol of Cray Research and supercomputing in general. The “C” shape also allowed the seating area to serve as a cover for the cooling system
Modules Modules consisting of two PCBs sandwiched together with components mounted on both sides: Each module contained a specific portion of the computer’s logic (e.g., part of a functional unit). Enabled a high density of components in a relatively small space. The modular design also facilitated manufacturing and maintenance.
Printed Circuit Boards (PCBs) Five-layer PCBs: Allowed for complex interconnections between the ICs on each module. Enabled dense and intricate circuit layouts, contributing to the Cray-1’s speed and compact size. Multilayer PCBs were essential for managing the complexity of the Cray-1’s design.
Power Supplies Large power supplies located in the base of the chassis: Provided the various voltages required by the ECL circuits. The power supplies were also cooled by the Freon refrigeration system. Delivered the substantial power required by the high-speed ECL circuits (around 115 kW for a fully configured system). The integration of the power supplies into the cooling system helped to manage the overall thermal load.
Interconnect
PCB Traces Primary means of interconnection within modules: Copper traces on the five-layer PCBs connected the ICs on each module. Provided high-density interconnections within modules. Careful attention was paid to trace routing and impedance matching to ensure signal integrity at the Cray-1’s high clock speeds.
Backplane No traditional backplane: Instead, modules were connected directly to each other using twisted-pair cables and edge connectors. This minimized wire lengths but made the wiring very intricate. Reduced signal delays and contributed to the Cray-1’s high performance. The elimination of a backplane was a bold design choice that required careful planning and a complex wiring scheme.
Twisted-Pair Cables Used for interconnections between modules: Each wire-pair carried a single signal in differential mode. Over 200 miles of wire was used in the system. Provided good signal integrity and noise immunity. Twisted-pair cables were essential for managing signal reflections and crosstalk in the high-speed system. The sheer amount of wiring in the Cray-1 was a testament to its complexity.
Coaxial Cables Used for clock signals and other critical signals: Provided impedance matching and shielding to ensure signal integrity. Ensured reliable transmission of high-speed clock signals. Coaxial cables were used sparingly but were crucial for maintaining the precise timing required by the Cray-1’s synchronous design.

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Overall Challenges and Impact:

  • Thermal Management: The Cray-1’s high-speed ECL circuits and dense packaging generated significant heat. The innovative Freon cooling system, with its cold bars and integrated heat exchanger, was essential for reliable operation.
  • Signal Integrity: The 12.5 ns clock cycle required careful attention to signal integrity. The use of controlled impedance PCBs, twisted-pair cables, and coaxial cables for critical signals was crucial for minimizing signal reflections and ensuring reliable operation.
  • Manufacturing Complexity: The Cray-1’s dense packaging, intricate wiring, and sophisticated cooling system made it a challenging machine to manufacture. It required highly skilled technicians and specialized assembly techniques.
  • Iconic Design: The Cray-1’s C-shaped chassis, with its integrated cooling system and colorful panels, became an iconic symbol of supercomputing.

Legacy:

The Cray-1’s innovations in cooling, packaging, and interconnect were essential to its success and had a lasting impact on the supercomputer industry. The use of refrigerant cooling, high-density packaging, and direct module-to-module connections became hallmarks of Cray supercomputers for many years. The Cray-1’s design pushed the boundaries of what was possible with the technology of its time and paved the way for the development of even more powerful supercomputers in the years to come. Its iconic design also helped to popularize supercomputing and make it a visible symbol of technological advancement.

 

Cray-1 Machine Design

 The Cray-1, introduced in 1976, was a groundbreaking supercomputer designed by Seymour Cray. It was the first commercially successful vector processor, and Cray Research was established as the dominant force in the high-performance computing market. Here’s a detailed look at its key design elements:

  1. Architecture:
  • Vector Processing: The Cray-1’s most significant innovation was its use of vector registers and functional units. This allowed it to perform the same operation on multiple data elements (a vector) simultaneously, resulting in significant performance gains for suitable applications.
  • Scalar Processing: In addition to its vector capabilities, the Cray-1 also included scalar registers and functional units for general-purpose processing, providing flexibility for handling non-vectorizable code.
  • RISC-like Design: While not strictly a Reduced Instruction Set Computer (RISC) in the modern sense, the Cray-1 had a relatively simple and streamlined instruction set compared to complex instruction set computers (CISCs) of the time.
  • Word Length: 64 bits for both data and addresses. This allowed for high precision in calculations and a large address space.
  • Registers:
    • Vector Registers: Eight vector registers (V0-V7), each holding 64 elements of 64 bits each.
    • Scalar Registers: Eight 64-bit scalar registers (S0-S7) for general-purpose computations.
    • Address Registers: Eight 24-bit address registers (A0-A7) for memory addressing.
    • Supporting Registers: Sixty-four 64-bit registers (T) and sixty-four 24-bit registers (B) are used as temporary storage or buffers between memory and the S and A registers, respectively.
  • Memory Addressing: 24-bit addresses, allowing for a maximum of 16 MW (megawords) of main memory. In practice, Cray-1 systems were typically configured with 1, 2, or 4 MW of memory. (1 MW = 1,048,576 words)
  1. Memory:
  • Semiconductor RAM: The Cray-1 used high-speed bipolar semiconductor memory (RAM) for its main memory. This was a significant departure from the core memory used in previous supercomputers.
  • Capacity: Typically configured with 1, 2, or 4 megawords (MW) of 64-bit words. Each word also had 8 check bits for error detection and correction.
  • Cycle Time: 50 ns (four clock cycles).
  • Access Time: Effectively one word per clock cycle after the four-cycle latency due to pipelining and interleaving.
  • Memory Banks: The memory was organized into 16 banks, which could be accessed independently and simultaneously. This interleaving allowed for high memory bandwidth.
  • Error Detection and Correction: The memory system included error detection and correction circuitry to improve reliability.
  1. Input/Output (I/O):
  • I/O Subsystem: The Cray-1 had a separate I/O subsystem that could handle data transfers between main memory and peripheral devices without significantly impacting the CPU’s performance.
  • Channels: The I/O subsystem had multiple channels, each of which could be connected to a peripheral controller.
  • Direct Memory Access (DMA): The I/O subsystem could transfer data directly to and from main memory, freeing the CPU from involvement in these transfers.
  • Peripheral Devices: The Cray-1 supported a range of peripherals, including:
    • Disk drives (DD-19, DD-29, DD-39, DD-49)
    • Magnetic tape drives
    • Printers
    • Front-end computers (typically Data General Eclipse or later Cray models)
  1. Instruction Set:
  • Scalar and Vector Instructions: The Cray-1 instruction set included both scalar and vector instructions, providing flexibility for programming different types of applications.
  • Vector Instructions: Vector instructions operate on entire vectors of data, performing the same operation on each element of the vector.
  • Chaining: The Cray-1 supported a feature called chaining, which allowed the results of one vector operation to be fed directly into another vector operation without having to be stored back in memory first. This significantly improved performance by reducing memory accesses and pipeline stalls.
  • Simple and Regular: The instruction set was designed to be simple and regular, making it relatively easy to learn and program.
  1. Performance Enhancements:
  • Vector Processing: The use of vector registers and functional units was the primary performance enhancement, providing significant speedups for vectorizable code.
  • Pipelining: Deeply pipelined functional units, both scalar and vector, allowed for overlapped execution of instructions.
  • Chaining: Vector chaining minimized memory accesses and pipeline stalls, improving performance.
  • High Clock Speed: The 12.5 ns clock cycle (80 MHz) was extremely fast for its time.
  • Memory Interleaving: Multiple memory banks allowed for simultaneous memory accesses, increasing memory bandwidth.
  1. Physical Design:
  • Iconic C-Shaped Chassis: The Cray-1’s distinctive C-shaped chassis was not just for aesthetics. It minimized wire lengths, reducing signal delays, and provided space for the cooling system at the base.
  • High-Density Packaging: Used modules with two PCBs sandwiched together, with components mounted on both sides.
  • Freon Refrigeration: Employed a sophisticated Freon-based refrigeration system to cool the high-speed ECL circuits.
  • Integrated Power Supplies: Power supplies were located in the base of the chassis and were also cooled by the Freon system.
  1. Software:
  • Cray Operating System (COS): The primary operating system for the Cray-1. It was a batch-oriented system designed for high performance.
  • Cray Time-Sharing System (CTSS): A time-sharing operating system developed at Lawrence Livermore National Laboratory.
  • Cray FORTRAN (CFT): A highly optimizing FORTRAN compiler that could automatically vectorize code, taking advantage of the Cray-1’s vector processing capabilities.
  • Cray Assembly Language (CAL): An assembly language that gave programmers complete control over the Cray-1’s hardware.
  • Third-Party Software: A growing library of scientific and engineering applications was developed for the Cray-1 by third-party vendors and users.

Impact and Legacy:

  • Popularized Vector Processing: The Cray-1 was the first commercially successful vector supercomputer and helped to establish vector processing as a dominant paradigm in high-performance computing.
  • Established Cray Research: The Cray-1’s success launched Cray Research into the forefront of the supercomputer industry, a position it maintained for many years.
  • Seymour Cray’s Masterpiece: The Cray-1 is considered by many to be Seymour Cray’s greatest achievement, showcasing his genius for computer design.
  • Advancement of Scientific Computing: The Cray-1 enabled scientists and engineers to tackle computational problems that were previously impossible, leading to significant advancements in fields such as weather forecasting, fluid dynamics, and nuclear research.
  • Influence on Supercomputer Design: The Cray-1’s architecture and design principles influenced the development of many subsequent supercomputers, both from Cray Research and other manufacturers.

The Cray-1 was a revolutionary machine that transformed the landscape of high-performance computing. Its innovative vector processing architecture, combined with its high clock speed, sophisticated cooling system, and iconic design, made it the fastest and most sought-after supercomputer of its time. The Cray-1’s legacy continues to influence the design of high-performance computers today, and it remains a symbol of the golden age of supercomputing.

 

Cray-1 Software table

The Cray-1, while renowned for its groundbreaking hardware, also had a software ecosystem that evolved over time to take full advantage of its vector processing capabilities. Here’s a table summarizing some of the key software developed for the Cray-1:

Software Name/Type Description Significance
Operating Systems
Cray Operating System (COS) The primary operating system for the Cray-1 was developed by Cray Research. It was a batch-oriented system designed for high performance and efficient utilization of the Cray-1’s resources. Provided a stable and efficient platform for running large-scale scientific and engineering applications. Managed job scheduling, resource allocation, and I/O operations. Optimized for the Cray-1’s architecture.
Cray Time-Sharing System (CTSS) A time-sharing operating system developed at Lawrence Livermore National Laboratory and later supported by Cray Research. Allowed multiple users to interactively access the Cray-1 simultaneously. Enabled interactive program development and debugging, which was particularly useful for code optimization and vectorization. Provided a more user-friendly environment than batch processing for certain types of tasks.
UNICOS A UNIX-based operating system developed by Cray Research in the mid-1980s as a successor to COS and CTSS. Provided a more modern and familiar environment for users accustomed to UNIX. Became the standard operating system for later Cray systems.
Compilers
Cray FORTRAN (CFT) A highly optimizing FORTRAN compiler developed by Cray Research. It could automatically vectorize code, taking advantage of the Cray-1’s vector processing capabilities. Enabled scientists and engineers to achieve high performance on the Cray-1 without having to write assembly code. The CFT compiler was renowned for its ability to automatically generate highly efficient vector code from standard FORTRAN, making it a key tool for harnessing the power of the Cray-1.
Cray Pascal A Pascal compiler developed by Cray Research. Provided an alternative high-level programming language for the Cray-1, although FORTRAN remained the dominant language for scientific computing.
Cray C A C compiler developed by Cray Research. Offered a systems programming language alternative for the Cray-1. Became more important with the advent of UNICOS.
Assemblers
Cray Assembly Language (CAL) The assembly language for the Cray-1. Provided programmers with complete control over the machine’s hardware. Allowed for maximum performance optimization and the development of highly specialized routines. Essential for system programming and for implementing performance-critical kernels that could not be adequately optimized by the compilers.
Libraries
BLAS (Basic Linear Algebra Subprograms) A library of highly optimized routines for performing basic linear algebra operations, such as vector addition, dot products, and matrix-vector multiplication. Often implemented in assembly language for maximum performance. Provided building blocks for many scientific and engineering applications. The BLAS routines were essential for achieving high performance in linear algebra computations, which are fundamental to many scientific algorithms.
LINPACK A library of routines for solving systems of linear equations. A widely used benchmark for measuring the performance of high-performance computers. Provided a standard set of routines for solving linear systems, a common task in scientific computing.
EISPACK A library of routines for solving eigenvalue problems. Another important library for scientific computing, used in applications such as structural analysis and quantum mechanics.
Other Scientific Libraries Numerous other libraries were developed for the Cray-1, both by Cray Research and by third-party developers and users, to support a wide range of scientific and engineering applications. Provided specialized tools and algorithms for various domains, such as fluid dynamics, structural analysis, and molecular modeling. These libraries helped to expand the range of applications that could effectively utilize the Cray-1’s computational power.
Debuggers and Performance Tools
DDT (Dynamic Debugging Tool) An interactive debugger that allowed programmers to step through their code, inspect memory and registers, and identify errors. Essential for program development and debugging, especially given the complexity of vector programming.
Flow Trace A performance analysis tool that provided information about the execution flow of a program, including the time spent in different routines and the utilization of the vector functional units. Helped programmers identify performance bottlenecks and optimize their code for the Cray-1’s architecture. Understanding how code utilized the vector units was crucial for achieving peak performance.
Applications
Weather Modeling The Cray-1 was used for weather forecasting and climate modeling, enabling more accurate and detailed simulations. One of the key application areas for supercomputers. The Cray-1’s performance enabled significant advancements in weather and climate modeling.
Nuclear Research The Cray-1 was used extensively in nuclear weapons research and other areas of nuclear physics. Another major driver for the development of supercomputers. The Cray-1’s speed was essential for performing the complex simulations required in nuclear research.
Fluid Dynamics The Cray-1 was used to simulate fluid flow in various applications, including aircraft design, aerodynamics, and hydrodynamics. The Cray-1’s vector processing capabilities were particularly well-suited for fluid dynamics simulations, which often involve large grids of data and repetitive calculations.
Structural Analysis The Cray-1 was used to analyze the structural integrity of buildings, bridges, and other structures. Allowed for more detailed and accurate structural analysis, leading to safer and more efficient designs.
Seismic Processing The Cray-1 was used in the oil and gas industry for seismic data processing, helping to locate oil and gas reserves. Another important application area where the Cray-1’s computational power provided a significant advantage.

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Important Notes:

  • Early Supercomputer Software: The software ecosystem for the Cray-1, while advanced for its time, was still relatively primitive compared to modern systems.
  • Cray Research’s Role: Cray Research played a major role in developing much of the software for the Cray-1, including the operating systems, compilers, and many libraries.
  • User Contributions: Users and user groups also made significant contributions to the Cray-1’s software library, developing and sharing specialized applications and tools.
  • FORTRAN’s Dominance: FORTRAN remained the dominant programming language on the Cray-1, and the CFT compiler’s ability to automatically vectorize code was a major factor in the machine’s success.

The software developed for the Cray-1 was crucial to its success as a supercomputer. The availability of efficient operating systems, highly optimizing compilers like CFT, and a growing library of scientific and engineering applications enabled users to harness the Cray-1’s immense computational power. The Cray-1’s software ecosystem helped to drive the adoption of vector processing and laid the foundation for the development of more sophisticated software tools and applications for future generations of supercomputers.

 

Cray-1 Marketing table, Sales table

Let’s create separate marketing and sales tables for the Cray-1, the groundbreaking supercomputer that launched Cray Research to the forefront of the industry.

Cray-1 Marketing Table

Marketing Aspect Details Impact and Significance
Positioning
Performance Leadership Marketed as the fastest computer in the world, offering a significant performance advantage over all existing systems. This was the primary selling point and a major draw for customers with the most demanding computational needs.
Vector Processing Emphasized the Cray-1’s innovative vector processing capabilities, which enabled dramatic speedups for scientific and engineering applications. This was a key differentiator and helped to establish vector processing as a dominant paradigm in high-performance computing.
Seymour Cray’s Design Leveraged Seymour Cray’s reputation as the leading architect of supercomputers, emphasizing his personal involvement in the Cray-1’s design. Cray’s name was synonymous with high performance, and his association with the Cray-1 added significant credibility and prestige.
Target Audience
National Laboratories Primarily targeted national laboratories involved in defense, energy, and scientific research (e.g., Los Alamos, Lawrence Livermore). These institutions had the most demanding computational needs and were the traditional users of supercomputers. They also had the budgets to afford a Cray-1 and were influential in setting trends for the broader scientific community.
Government Agencies Other government agencies with high-performance computing requirements, such as intelligence agencies and NASA. Similar to national labs, these agencies required the fastest computers for their mission-critical applications and had the funding to acquire them.
Weather Centers National weather services and research institutions worldwide. Weather forecasting was a key application area for supercomputers, and the Cray-1’s performance enabled significant improvements in weather modeling and prediction.
Universities A select few top research universities with strong programs in science and engineering and substantial funding for high-performance computing. Universities played a role in pushing the boundaries of computational science and training the next generation of researchers.
Emerging Commercial Markets Oil and gas, aerospace, and other industries began to show interest in using supercomputers for applications like seismic processing and computational fluid dynamics. The Cray-1 helped to open up new commercial markets for supercomputing, although its high cost limited its initial adoption in these sectors.
Marketing Channels
Industry Conferences Cray Research presented the Cray-1 at supercomputing conferences and trade shows. Provided visibility and a platform to showcase the machine’s capabilities to potential customers and the wider high-performance computing community.
Technical Publications Papers and articles on the Cray-1’s architecture and performance were published in technical journals and conference proceedings. Disseminated technical information and helped to establish the Cray-1’s credentials as a major advancement in computer architecture.
Direct Sales Cray Research employed a technically skilled sales force that engaged directly with potential customers, often working closely with them to understand their needs and demonstrate the Cray-1’s capabilities. This personalized approach was essential for selling a complex and expensive product like the Cray-1. The sales force’s technical expertise was crucial for effectively communicating the machine’s value proposition.
Marketing Messages
Fastest Computer in the World This was the central message, emphasizing the Cray-1’s unparalleled speed and performance. Appealed to customers who prioritized performance above all else.
Vector Processing Revolution Promoted vector processing as a revolutionary approach to high-performance computing, highlighting the Cray-1’s ability to accelerate scientific and engineering applications. Educated potential customers about the benefits of vector processing and positioned the Cray-1 as the leading machine for this new paradigm.
Iconic Design The Cray-1’s unique C-shaped chassis and colorful exterior made it visually striking and helped it to become an icon of the supercomputer era. The distinctive design helped to generate excitement and interest in the Cray-1, making it a memorable and recognizable symbol of technological advancement.
Seymour Cray’s Genius Emphasized Seymour Cray’s role as the visionary behind the Cray-1, reinforcing his reputation for designing the world’s fastest computers. Capitalized on Cray’s reputation and positioned the Cray-1 as a unique and groundbreaking machine.
Challenges
High Price The Cray-1 was very expensive (around $5-10 million), limiting its market to organizations with large budgets. This was a barrier to adoption for many potential customers, especially in the commercial sector.
New Architecture The Cray-1’s vector processing architecture was new and required software to be adapted or rewritten to take full advantage of its capabilities. This created a software development challenge and initially limited the availability of optimized applications.
Competition While the Cray-1 was initially the clear performance leader, it did face competition from other vendors, such as CDC. This competition spurred continued innovation in the supercomputer market.

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Cray-1 Sales Table

Customer Number of Systems Delivery Date(s) Notes
Los Alamos National Laboratory (LANL) Multiple 1976-1980 LANL was the first customer to receive a Cray-1 (serial number 001). They were a major user of Cray systems and played a key role in evaluating and testing the Cray-1.
National Center for Atmospheric Research (NCAR) Multiple 1977-1980 NCAR was another early adopter of the Cray-1 and used it for weather and climate modeling.
Lawrence Livermore National Laboratory (LLNL) Multiple 1978-1980 LLNL was also a significant user of Cray systems and used the Cray-1 for a variety of scientific applications, including weapons research.
European Centre for Medium-Range Weather Forecasts (ECMWF) 1 1978 One of the first international customers, highlighting the global demand for the Cray-1’s performance.
United Kingdom Atomic Energy Authority (UKAEA) 1 1979 Used for nuclear research and other scientific applications.
NASA Multiple 1979-1982 Used for aerospace research and other computationally intensive tasks.
Other US Government Agencies Several 1978-1982 Including intelligence agencies and other research organizations. Details are often classified.
Universities A few 1979-1982 Including Purdue University and the University of Michigan. Limited adoption due to the high cost.
Commercial Customers A few 1980-1983 Including United Computing Systems (later acquired by Cray Research) and a small number of oil and gas companies. Early adoption in the commercial sector.
International Customers Several 1979-1983 Including customers in France, Germany, and Japan. Demonstrated the global reach of Cray Research.
Totals ~80-100 1976-1983 A significant commercial success for a groundbreaking supercomputer. Established Cray Research as the leader in the high-performance computing market.

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Reasons for Success:

  • Performance Leadership: The Cray-1 was significantly faster than any other computer at the time of its introduction.
  • Vector Processing: The Cray-1’s vector architecture was well-suited for many scientific and engineering applications.
  • Seymour Cray’s Reputation: Seymour Cray’s track record of designing the fastest computers in the world gave customers confidence in the Cray-1.
  • Strong Marketing and Sales: Cray Research effectively marketed the Cray-1’s capabilities and built strong relationships with key customers.
  • Iconic Design: The Cray-1’s distinctive C-shaped chassis made it instantly recognizable and helped to create a buzz around the machine.

Conclusion:

The Cray-1 was a landmark achievement in the history of computing. Its marketing and sales success established Cray Research as the dominant supercomputer market player and helped popularize vector processing. The Cray-1’s impact on scientific computing was profound and long-lasting, and it remains an icon of the early days of the supercomputer era.

 

Cray-2 1985

Front view of 1985 Supercomputer Cray-2, Musée des Arts et Métiers, Paris

(Wiki Image By Edal, CC BY-SA 3.0, https://commons.wikimedia.org/w/index.php?curid=11623837) 

 

Cray-2 Circuits and Cycle Time table 

The Cray-2, introduced in 1985, was Seymour Cray’s successor to the Cray-1 and Cray X-MP. It represented a significant departure from previous Cray designs, featuring a highly compact, immersive cooling system and a shared memory architecture. Here’s a table summarizing its circuits and cycle time:

Feature Details Impact and Significance
Circuit Technology
Transistors High-speed ECL bipolar transistors: Similar to the Cray-1, the Cray-2 used ECL for its high switching speeds. However, the Cray-2 utilized integrated circuits with a higher gate density. Enabled very fast clock speeds, contributing to the Cray-2’s performance. ECL remained the fastest logic family available at the time, but its high power consumption required a sophisticated cooling solution.
Integrated Circuits (ICs) Denser ECL ICs than the Cray-1: The Cray-2 used custom ECL gate array ICs with up to 16 logic gates per chip. Allowed for greater circuit density and reduced signal delays compared to the Cray-1. The denser ICs contributed to the Cray-2’s smaller physical size and increased performance.
Resistors Integrated onto the ICs. Reduced the number of discrete components, simplifying manufacturing and improving reliability.
Printed Circuit Boards (PCBs) Eight-layer PCBs: Allowed for complex interconnections between the ICs on each module. Enabled dense and intricate circuit layouts, contributing to the Cray-2’s speed and compact size. Multilayer PCBs were essential for managing the complexity of the Cray-2’s design.
Logic Design
Emitter-Coupled Logic (ECL) Used ECL throughout the system for both logic and memory circuits. Provided very high switching speeds, crucial for achieving the Cray-2’s performance. ECL’s speed came at the cost of high power consumption, which necessitated the Cray-2’s unique liquid immersion cooling system.
Boolean Algebra Foundation of logic design: Same underlying principles as previous computers. The fundamental mathematics of digital logic remained unchanged.
Synchronous Design Clock-driven operation: Used a single 4.1 ns clock cycle. Provided predictable timing and simplified design. The Cray-2’s clocking system was highly optimized for speed.
Vector Processing Enhanced vector processing capabilities compared to the Cray-1: The Cray-2 had four background processors, each with its own set of vector registers and functional units. Increased vector processing throughput. The Cray-2’s four-processor architecture allowed for parallel execution of vector operations, significantly improving performance for applications that could be vectorized.
Scalar Processing Each processor included scalar registers and functional units for general-purpose processing. Provided flexibility for handling code that could not be vectorized. The Cray-2 was designed to be a powerful general-purpose computer, not just a specialized vector processor.
Cycle Time
Clock Speed 244 MHz (4.1 ns clock cycle). Extremely fast for its time, significantly faster than the Cray-1. The fast clock speed was a key factor in the Cray-2’s performance.
Memory Cycle Time Approximately 58 ns for the first word in a sequence, then one word per clock cycle (4.1 ns) thereafter. Used static RAM (SRAM) for main memory which was faster than the dynamic RAM (DRAM) used on other computers of the era. Fast memory access was crucial for feeding the vector pipelines with data. The Cray-2’s memory system was designed to provide high bandwidth and relatively low latency, considering the extremely fast clock speed.
Instruction Execution Time Variable, depending on instruction and whether it was scalar or vector: Vector instructions could achieve significantly higher throughput than scalar instructions. The Cray-2’s performance was highly dependent on the ability to vectorize code.
* Similar to Cray-1, but could run at a higher rate due to the faster clock and multiple processors.
* Vector Add: Effectively 1 result per clock cycle per processor (after pipeline fill)
* Vector Multiply: Effectively 1 result per clock cycle per processor (after pipeline fill) These numbers are illustrative.
Performance Enhancement
Vector Processing Enhanced vector processing with four background processors: Allowed for parallel execution of vector operations. Significantly increased performance for applications that could be vectorized. The Cray-2’s four-processor architecture was a major advancement over the Cray-1’s single-processor design.
Pipelining Deeply pipelined functional units: Both scalar and vector functional units were pipelined, allowing for overlapped execution of instructions. Increased instruction throughput. Pipelining was essential for achieving high performance in both scalar and vector operations.
Chaining Vector chaining: Similar to the Cray-1, the Cray-2 supported vector chaining, allowing the results of one vector operation to be fed directly into another vector operation without having to be stored back in memory first. Reduced memory accesses and improved performance. Chaining was a key optimization for vector processing that minimized delays between dependent operations.
Shared Memory All four processors shared a common main memory: This simplified programming and allowed for efficient data sharing between processors. Made it easier to parallelize code for the Cray-2 compared to distributed memory architectures. The shared memory model was a good fit for many scientific applications.
Local Memory Each processor had a small (16 KW) very fast local memory for storing frequently used data and instructions. Reduced memory access latency for critical data. The local memory acted as a cache, helping to bridge the speed gap between the processors and the main memory.

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Key Takeaways:

  • Denser ECL ICs: Allowed for a more compact and powerful design compared to the Cray-1.
  • Four-Processor Architecture: The use of four processors significantly increased the Cray-2’s vector processing capabilities.
  • Shared Memory with Local Cache: The combination of large shared memory and fast local memories provided both programming convenience and high performance.
  • Liquid Immersion Cooling: The Cray-2’s unique cooling system was essential for managing the heat generated by its high-speed circuits.

The Cray-2 was a significant advancement in supercomputer design, pushing the boundaries of performance and introducing innovative concepts such as liquid immersion cooling and a shared memory multiprocessor architecture. While it maintained some similarities to the Cray-1, such as the use of ECL circuits and vector processing, the Cray-2’s unique features set it apart and solidified Cray Research’s position as a leader in the high-performance computing market.

 

Cray-2 Cooling, Packaging, and Interconnect table

 The Cray-2 was a radical departure from previous supercomputer designs in terms of its cooling, packaging, and interconnect. Seymour Cray’s innovative approach to these challenges resulted in a highly compact and powerful machine. Here’s a table summarizing these aspects:

Aspect Details Impact and Considerations
Cooling
Liquid Immersion Cooling Modules were completely immersed in a colorless, odorless, inert fluorocarbon liquid (Fluorinert FC-77, made by 3M): The liquid circulated through the modules, directly contacting the components and carrying away heat. Revolutionary approach to cooling that allowed for extremely dense packaging and very high clock speeds. Provided far more efficient heat transfer than air cooling or even the Freon refrigeration used in earlier Crays. Enabled the Cray-2’s performance by effectively managing the heat generated by its ECL circuits.
No Heat Sinks Components had no heat sinks: Heat was transferred directly from the integrated circuits to the surrounding Fluorinert. Simplified the design of the modules and further increased component density. Eliminated the need for bulky heat sinks and the associated thermal interface materials.
Pumps Two pumps circulated the Fluorinert: One pump circulated the liquid through the modules and a heat exchanger. The other circulated chilled water through the other side of the heat exchanger. Maintained a constant flow of coolant through the system, ensuring effective heat removal. The pumps were critical components of the cooling system, and their reliability was essential for the Cray-2’s operation.
Heat Exchanger External heat exchanger: Transferred the heat from the Fluorinert to a separate chilled water loop. Allowed the Cray-2 to dissipate its heat to the external environment. The heat exchanger was a crucial link between the Cray-2’s internal cooling system and the facility’s cooling infrastructure.
Packaging
Cylindrical Chassis Compact cylindrical chassis, smaller than the Cray-1: The chassis was divided into 14 vertical columns arranged in a 300-degree arc. Minimized wire lengths and contributed to the machine’s high performance. The cylindrical shape also gave the Cray-2 a distinctive appearance.
Modules Eight-layer 3D modules: Each module consisted of a stack of eight PCBs interconnected with pins. Each PCB held about 150 ICs. Modules were very densely packed. Allowed for an incredibly high concentration of components in a small space, but made manufacturing and assembly extremely challenging. The 3D modules were a key innovation that enabled the Cray-2’s compact size and performance.
Power Supplies Located in a separate cabinet: Unlike the Cray-1, the power supplies were not integrated into the main chassis. Reduced the heat load within the main chassis and simplified the design of the cooling system. Separating the power supplies also made them easier to maintain and replace.
Interconnect
PCB Traces Primary means of interconnection within modules: Copper traces on the eight-layer PCBs connected the ICs on each board. Provided high-density interconnections within modules. Careful attention was paid to trace routing and impedance matching to ensure signal integrity at the Cray-2’s high clock speeds.
Inter-Module Connectors Vertical pins connecting the eight PCBs within a module: These pins provided the connections between the layers of the 3D modules. Enabled a very dense and compact module design. The inter-module connectors were a critical part of the Cray-2’s intricate interconnect system. Manufacturing tolerances were extremely tight.
Edge Connectors Gold-plated edge connectors: Used to connect the modules to the backplane and then to each other within a column. Provided reliable connections between the modules and the backplane. Gold plating ensured good electrical contact and resistance to corrosion.
Backplane Limited backplane: Primarily used to distribute power and clock signals to the modules, not for general signal routing. Minimized the use of backplane wiring, reducing signal delays. The Cray-2’s design relied heavily on direct module-to-module connections to achieve high performance.
Cables Twisted-pair and coaxial cables used for interconnections between columns and to external devices: The limited cable runs were made as short as possible. Provided connections between the different parts of the system. The use of specialized cables helped to maintain signal integrity. The short cable lengths, due to the compact packaging, minimized signal delays.

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Overall Challenges and Impact:

  • Thermal Management: The Cray-2’s high-speed ECL circuits and extremely dense packaging generated a tremendous amount of heat. The liquid immersion cooling system was a radical and highly effective solution, but it also presented significant engineering challenges.
  • Manufacturing Complexity: The Cray-2’s 3D modules and intricate interconnect system were incredibly difficult to manufacture, requiring specialized techniques and extremely tight tolerances.
  • Reliability: Maintaining the purity and proper flow of the Fluorinert was crucial for the Cray-2’s reliability. Any leaks or contamination could have serious consequences.
  • Cost: The Cray-2 was an extremely expensive machine to design, manufacture, and purchase, due to its advanced technology and complex construction.

Legacy:

The Cray-2’s innovations in cooling, packaging, and interconnect were essential to its performance and had a lasting impact on the supercomputer industry. The use of liquid immersion cooling, while not widely adopted, demonstrated the potential of this technology for managing heat in high-density systems. The Cray-2’s compact and intricate design pushed the boundaries of what was possible with the technology of its time and influenced the development of future generations of high-performance computers. Although the Cray-2 was not as commercially successful as the Cray-1, it was a bold and innovative machine that advanced the state of the art in supercomputer design.

 

Cray-2 Machine Design 

The Cray-2, introduced in 1985, was a significant departure from its predecessors, the Cray-1 and X-MP. Designed by Seymour Cray, it featured a revolutionary liquid immersion cooling system, a shared memory multiprocessor architecture, and a remarkably compact design. Here’s a detailed look at its key design elements:

  1. Architecture:
  • Multiprocessor System: The Cray-2 was a shared-memory multiprocessor system with four independent background processors. This was a significant departure from the single-processor Cray-1 and allowed for parallel processing of multiple tasks or a single task that could be split among processors.
  • Vector and Scalar Processing: Each processor had both vector and scalar processing capabilities, similar to the Cray-1.
  • Local Memory: Each processor had its own 16-kiloword (KW) local memory for storing frequently accessed data and instructions. This was a new feature not present in the Cray-1.
  • Shared Global Memory: All four processors shared a large common memory, allowing them to easily share data and coordinate their work.
  • Foreground Processor: A separate foreground processor was responsible for managing system resources, I/O operations, and communication with external devices. In a typical configuration, the foreground processor was a Cray X-MP.
  • Word Length: 64 bits for data and addresses, similar to the Cray-1.
  • Registers: Each background processor had:
    • Eight 64-element vector registers (V0-V7): Each element was 64 bits wide.
    • Eight 64-bit scalar registers (S0-S7).
    • Eight 24-bit address registers (A0-A7).
    • 64-bit vector mask (VM) register.
    • 32-bit vector length (VL) register.
    • Local Memory: Each processor had a 16K word (128 KB) local memory for very fast data access.
  1. Memory:
  • Shared Global Memory:
    • Capacity: Up to 256 megawords (2 gigabytes). This was a massive amount of memory for the time and one of the Cray-2’s key selling points.
    • Technology: Static RAM (SRAM) – faster but more expensive than the DRAM used in most computers of the era.
    • Organization: Divided into 128 interleaved banks. This allowed for high memory bandwidth, as multiple memory accesses could be in progress simultaneously.
    • Cycle Time: Approximately 58 ns for the first word, then one word per clock cycle (4.1 ns).
  • Local Memory:
    • Capacity: 16 kilowords (128 kilobytes) per processor.
    • Technology: Very fast SRAM.
    • Cycle Time: One word per clock cycle (4.1 ns).
    • Purpose: Served as a fast cache for each processor, storing frequently used data and instructions.
  1. Input/Output (I/O):
  • Foreground Processor: Typically a Cray X-MP handled I/O processing, freeing up the background processors for computation.
  • High-Speed Channels: The Cray-2 used high-speed channels to connect to the foreground processor and peripheral devices.
  • Direct Memory Access (DMA): Allowed data transfers between I/O devices and main memory without involving the background processors.
  • Peripheral Devices: The Cray-2 could be connected to a variety of peripherals, including:
    • Disk drives
    • Magnetic tape drives
    • Printers
    • Networking interfaces
  1. Instruction Set:
  • Similar to Cray-1: The Cray-2’s instruction set was similar to that of the Cray-1, with both scalar and vector instructions.
  • New Instructions: Added new instructions to take advantage of the four-processor architecture and local memory.
  • Vector Enhancements: Improved vector processing capabilities compared to the Cray-1.
  1. Performance Enhancements:
  • Four-Processor Architecture: Allowed for parallel execution of tasks, significantly increasing performance for applications that could be parallelized.
  • Fast Clock Speed: The 4.1 ns clock cycle (244 MHz) was extremely fast for its time.
  • Vector Processing: Enhanced vector processing capabilities compared to the Cray-1.
  • Local Memory: The 16 KW local memory per processor provided very fast access to frequently used data and instructions.
  • Shared Memory: The large shared memory simplifies parallel programming and allows for efficient data sharing between processors.
  • Liquid Immersion Cooling: Enabled the high clock speeds and dense packaging by effectively managing the heat generated by the ECL circuits.
  1. Physical Design:
  • Compact Cylindrical Chassis: The Cray-2 had a highly compact cylindrical chassis, much smaller than the Cray-1.
  • 3D Modules: Used innovative 3D modules, each consisting of a stack of eight PCBs interconnected with pins.
  • Liquid Immersion Cooling: The entire system (except for power supplies) was immersed in a bath of inert fluorocarbon liquid (Fluorinert) for cooling.
  • External Heat Exchanger: An external heat exchanger transfers the heat from the Fluorinert to a chilled water loop.
  1. Software:
  • UNICOS: A UNIX-based operating system that was the primary OS for the Cray-2. It was a significant departure from the earlier Cray operating systems (COS and CTSS).
  • Cray FORTRAN (CFT77): A highly optimizing FORTRAN compiler that could automatically vectorize code and also took advantage of the Cray-2’s multiple processors.
  • C, Pascal: Other high-level languages were also supported.
  • CAL (Cray Assembly Language): Assembly language for the Cray-2.
  • Scientific Libraries: BLAS, LINPACK, EISPACK, and other libraries optimized for the Cray-2’s architecture.
  • Debugging and Performance Tools: Tools for debugging and optimizing code, including flow tracing and performance analysis utilities.

Impact and Legacy:

  • Pioneered Liquid Immersion Cooling: The Cray-2’s most significant innovation was its use of liquid immersion cooling, which allowed for unprecedented circuit density and clock speeds.
  • Advanced Shared Memory Multiprocessing: The Cray-2’s four-processor, shared-memory architecture was a major step forward in supercomputer design.
  • Continued Cray’s Dominance: Although not as commercially successful as the Cray-1 or X-MP, the Cray-2 further solidified Cray Research’s position as the leader in the high-performance computing market.
  • Influenced Future Designs: The Cray-2’s design, particularly its cooling system and multiprocessing architecture, influenced the development of future supercomputers.

The Cray-2 was a bold and innovative machine that pushed the boundaries of supercomputer design. Its liquid immersion cooling system, four-processor architecture, and large shared memory were major advancements that enabled new levels of performance. While it was a complex and expensive machine, the Cray-2 played an important role in the evolution of high-performance computing and demonstrated the continued importance of innovative hardware design in achieving computational breakthroughs.

 

Cray-2 Software table

The Cray-2, with its advanced hardware and unique architecture, required a robust software ecosystem to enable users to effectively harness its computational power. Here’s a table summarizing some of the key software developed for the Cray-2:

Software Name/Type Description Significance
Operating Systems
UNICOS The primary operating system for the Cray-2. A UNIX-based operating system that provided a familiar and powerful environment for users. Supported both interactive time-sharing and batch processing. Represented a major shift from the earlier Cray operating systems (COS and CTSS). Provided a more modern and standardized environment. UNIX compatibility made it easier to port existing software to the Cray-2 and facilitated the development of new applications.
Compilers
Cray FORTRAN (CFT77) A highly optimizing FORTRAN compiler developed by Cray Research. It could automatically vectorize code for execution on the Cray-2’s vector processors and also parallelize code for execution on multiple processors. Enabled scientists and engineers to achieve high performance on the Cray-2 by automatically exploiting its vector and parallel processing capabilities. CFT77 was known for its advanced optimization techniques and played a crucial role in making the Cray-2 a powerful platform for scientific computing.
C A C compiler for the Cray-2. Became increasingly important as UNIX gained popularity. Provided a systems programming alternative to FORTRAN and facilitated the development of new applications and tools on the Cray-2.
Pascal A Pascal compiler for the Cray-2. Offered another high-level language option, although FORTRAN and C were more widely used on the Cray-2.
Assemblers
CAL (Cray Assembly Language) The assembly language for the Cray-2. Allowed programmers to write code that directly controlled the machine’s hardware. Provided maximum control and flexibility for performance optimization. Essential for system programming, developing performance-critical kernels, and implementing specialized algorithms that could not be adequately handled by higher-level languages.
Libraries
BLAS (Basic Linear Algebra Subprograms) A library of highly optimized routines for performing basic linear algebra operations, such as vector addition, dot products, and matrix-matrix and matrix-vector multiplication. Optimized for the Cray-2’s vector and parallel architecture. Provided fundamental building blocks for many scientific and engineering applications. The BLAS routines were essential for achieving high performance in linear algebra computations, a core component of many scientific algorithms.
LINPACK A library of routines for solving systems of linear equations. Widely used as a benchmark for measuring the performance of high-performance computers. Provided a standard set of routines for solving linear systems, a common task in scientific computing. LINPACK performance was a key metric for evaluating the Cray-2’s capabilities.
EISPACK A library of routines for solving eigenvalue problems. Another important library for scientific computing is used in applications such as structural analysis and quantum mechanics.
Other Scientific Libraries Numerous other libraries were developed for the Cray-2, both by Cray Research and by third parties, to support a wide range of scientific and engineering applications. Provided specialized tools and algorithms for various domains, such as fluid dynamics, structural analysis, and molecular modeling. These libraries helped to expand the range of applications that could effectively utilize the Cray-2’s computational power.
Debugging and Performance Tools
DDT (Dynamic Debugging Tool) An interactive debugger that allowed programmers to step through their code, inspect memory and registers, and identify errors. Essential for program development and debugging, especially given the complexity of parallel programming on the Cray-2.
Flow Trace A performance analysis tool that provided information about the execution flow of a program, including the time spent in different routines and the utilization of the vector functional units and multiple processors. Helped programmers identify performance bottlenecks and optimize their code for the Cray-2’s architecture. Understanding how code utilized the vector units and multiple processors was crucial for achieving peak performance.
Applications
Weather and Climate Modeling The Cray-2 was used for weather forecasting and climate modeling, enabling more accurate and detailed simulations. One of the key application areas for supercomputers. The Cray-2’s performance and large memory capacity enabled significant advancements in weather and climate modeling.
Computational Fluid Dynamics (CFD) The Cray-2 was used to simulate fluid flow in various applications, including aircraft design, aerodynamics, and hydrodynamics. The Cray-2’s vector processing capabilities and large memory were particularly well-suited for CFD, which often involves large grids of data and repetitive calculations.
Nuclear Research The Cray-2 was used in nuclear weapons research and other areas of nuclear physics. Another major driver for the development of supercomputers. The Cray-2’s speed and memory capacity were essential for performing the complex simulations required in nuclear research.
Seismic Processing The Cray-2 was used in the oil and gas industry for seismic data processing, helping to locate oil and gas reserves. The Cray-2’s computational power provided a significant advantage in processing the vast amounts of data involved in seismic exploration.
Structural Analysis The Cray-2 was used to analyze the structural integrity of buildings, bridges, and other structures. Allowed for more detailed and accurate structural analysis, leading to safer and more efficient designs.

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Important Notes:

  • UNICOS’s Significance: The adoption of UNICOS as the primary operating system for the Cray-2 marked a significant shift towards UNIX in the supercomputer world.
  • FORTRAN’s Continued Importance: FORTRAN remained the dominant programming language for scientific and engineering applications on the Cray-2, and the CFT77 compiler was a key tool for achieving high performance.
  • Specialized Applications: Much of the software developed for the Cray-2 was highly specialized and tailored to the needs of specific scientific and engineering disciplines.
  • Importance of Libraries: Libraries like BLAS, LINPACK, and EISPACK played a crucial role in providing optimized building blocks for scientific applications.

The software developed for the Cray-2 was essential to its success as a supercomputer. The availability of a powerful and user-friendly operating system like UNICOS, highly optimizing compilers like CFT77, and a wide range of scientific libraries and application codes enabled users to effectively utilize the Cray-2’s advanced hardware architecture. The Cray-2’s software ecosystem helped to further advance the field of computational science and engineering and solidified the importance of software in achieving the full potential of high-performance computing systems.

 

Cray-2 Marketing table, Sales table

Okay, let’s break down the Cray-2’s marketing and sales into two separate tables, similar to what we did with the Cray-3.

Cray-2 Marketing Table

Marketing Aspect Details Impact and Significance
Positioning
Performance & Memory Marketed as the world’s most powerful supercomputer with an unprecedented amount of shared memory. Appealed to users with the most demanding computational needs, especially those limited by memory capacity on other systems.
Technological Innovation Highlighted the revolutionary liquid immersion cooling system and the four-processor architecture. Emphasized Cray Research’s continued leadership in technological innovation and positioned the Cray-2 as a cutting-edge machine.
Seymour Cray’s Design Although Cray’s direct involvement was less than with the Cray-1, his association and legacy were still used in marketing. Leveraged Cray’s reputation to build confidence in the product, though to a lesser extent than with previous machines.
Target Audience
Existing Cray Customers Targeted users of Cray-1 and X-MP systems who required more performance and, particularly, more memory. A natural upgrade path, leveraging existing relationships. However, the X-MP’s competitive performance and lower price made this a more nuanced sell.
National Laboratories Continued to focus on national labs involved in defense, energy, and scientific research. These institutions were the traditional mainstay of the supercomputer market and had the budgets and needs that aligned with the Cray-2’s capabilities.
Weather and Climate Centers Targeted due to their need for high performance and large memory capacity for complex simulations. The Cray-2’s large memory was a key advantage for this application area.
Universities A select few top research universities with very high computational needs and funding. Limited by the high cost, but some universities did acquire Cray-2 systems.
Emerging Commercial Markets Oil and gas, aerospace, and automotive industries were showing increasing interest, representing a potential growth area. The Cray-2’s high price and the rise of more cost-effective alternatives limited its penetration in the commercial sector.
Marketing Channels
Industry Conferences Cray Research presented the Cray-2 at supercomputing conferences and trade shows. Provided visibility and a platform to showcase the machine’s capabilities to potential customers and the wider high-performance computing community.
Technical Publications Papers and articles on the Cray-2’s architecture, cooling system, and performance were published. Disseminated technical information and helped to establish the Cray-2’s credentials.
Direct Sales Cray Research’s technically skilled sales force engaged directly with potential customers. Essential for understanding customer needs and effectively communicating the complex value proposition of the Cray-2.
Marketing Messages
Unprecedented Memory Capacity The Cray-2’s massive memory (up to 2 gigabytes) was a major selling point, enabling larger and more complex simulations than previously possible. Addressed a critical need for many memory-bound scientific applications.
Four-Processor Power Emphasized the performance advantages of the four-processor architecture for parallel applications. Appealed to users with codes that could be effectively parallelized.
Liquid Immersion Cooling The innovative cooling system was highlighted as a key technology that enabled the Cray-2’s performance and compact design. A unique differentiator and a talking point that showcased Cray Research’s engineering expertise.
UNIX and Open Systems Promoted the use of UNICOS, a UNIX-based operating system, making the Cray-2 more accessible and easier to integrate into existing computing environments. Reflected the growing importance of open systems and industry standards, broadening the Cray-2’s appeal beyond Cray’s traditional customer base.
Challenges
High Price The Cray-2 was extremely expensive (>$12 million), limiting its market. A major barrier to adoption, especially for commercial customers and universities.
Competition Faced competition from Cray Research’s own X-MP and Y-MP, as well as from emerging massively parallel systems and Japanese supercomputers. The X-MP/Y-MP offered a more proven and often more cost-effective solution, while MPPs were gaining traction and Japanese vendors were becoming increasingly competitive.
Market Shift The supercomputer market was beginning to shift towards more cost-effective solutions, often based on CMOS technology. The Cray-2’s specialized, high-cost design was becoming less aligned with broader market trends.

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Cray-2 Sales Table

Customer Number of Systems Configuration (Processors, Memory) Delivery Date(s) Notes
Lawrence Livermore National Laboratory (LLNL) 4 Multiple configurations, including 4 processors, 128 MW and 512 MW memory 1985-1988 LLNL was a major Cray customer and one of the first to acquire Cray-2 systems. Used for various scientific applications, including weapons research and climate modeling.
NASA Ames Research Center 1 4 processors, 512 MW memory 1985 Used for computational fluid dynamics (CFD) and other aerospace research.
Los Alamos National Laboratory (LANL) 1 4 processors, 512 MW memory 1986 Used for various scientific applications, including weapons research.
National Security Agency (NSA) ~2-3 Various configurations 1987-1988 Specific details are classified, but likely used for cryptanalysis and other intelligence applications.
University of Minnesota 1 4 processors, 128 MW memory 1986 One of the few universities to acquire a Cray-2. Used for various scientific research projects.
Other Customers ~5-10 Various configurations 1986-1990 A small number of Cray-2 systems were sold to other customers, including some in Europe and Japan. Details on these sales are less readily available.
Totals ~15-20 Significantly fewer sales than the Cray-1 or X-MP. Reflects the Cray-2’s high cost, specialized nature, and changing market conditions.

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Reasons for Limited Sales:

  • High Price: The Cray-2’s price tag of over $12 million was a major barrier to adoption.
  • Competition: The Cray X-MP and Y-MP offered strong performance at a lower price, and massively parallel systems were emerging as a viable alternative.
  • Market Shift: The supercomputer market was moving towards more cost-effective solutions, often based on CMOS technology.
  • Specialized Nature: The Cray-2’s liquid immersion cooling system and unique architecture made it more complex to install and maintain than other systems.

Conclusion:

The Cray-2, while a technological marvel, had limited commercial success. Its marketing emphasized its groundbreaking performance, large memory, and innovative cooling system. However, its high price, competition, and a changing market limited its sales. Despite selling fewer systems than its predecessors, the Cray-2 maintained Cray Research’s reputation for pushing the boundaries of supercomputer technology and contributed to advancements in areas like liquid immersion cooling and shared-memory multiprocessing. The sales figures highlight the challenges of marketing and selling extremely high-end, specialized supercomputers in an increasingly competitive and cost-conscious market.

 

Cray-3 1993

Seymour Cray stands behind a Cray-3 processor tank. The CPU occupies only the top of the tank, and the rest contains memory and power supplies.

(Wiki Image By Cray Computer Corporation – http://ascii.jp/elem/000/000/947/947983/, Fair use, https://en.wikipedia.org/w/index.php?curid=52050235) 

 

Cray-3 Circuits and Cycle Time table 

The Cray-3, developed in the late 1980s and early 1990s, was Seymour Cray’s attempt to push the boundaries of supercomputer performance even further. However, it faced numerous technical challenges and a changing market, ultimately leading to limited commercial success. Here’s a table summarizing its circuits and cycle time:

Feature Details Impact and Significance
Circuit Technology
Transistors Gallium Arsenide (GaAs) integrated circuits: A major departure from the silicon-based transistors used in previous Cray machines. GaAs offered potentially higher switching speeds than silicon. Promised significantly faster clock speeds and improved performance. However, GaAs technology was less mature than silicon and presented significant challenges in terms of manufacturing, yield, and reliability.
Integrated Circuits (ICs) High-density GaAs ICs: Each chip contained up to a few hundred logic gates, a higher level of integration than the Cray-2 but still relatively low compared to the CMOS chips that were becoming prevalent at the time. Allowed for more compact circuits and reduced signal delays. However, the yield of GaAs chips was a major problem, contributing to the Cray-3’s high cost and development delays.
Resistors Integrated onto the ICs. Similar to the Cray-2, this helped to reduce the number of discrete components.
Printed Circuit Boards (PCBs) Advanced multilayer PCBs: Used to interconnect the GaAs ICs on each module. Enabled dense and complex circuit layouts. The PCBs had to be carefully designed to manage signal integrity at the Cray-3’s high clock speeds.
Logic Design
Direct-Coupled FET Logic (DCFL) Used DCFL, a type of logic family suited for GaAs circuits. Offered high switching speeds but was very sensitive to variations in the manufacturing process. This contributed to the low yield and high cost of the Cray-3’s GaAs chips.
Boolean Algebra Foundation of logic design: Same underlying principles as previous computers. The fundamental mathematics of digital logic remained unchanged.
Synchronous Design Clock-driven operation: Used a 2.1 ns (480 MHz) clock cycle (initially). Later reduced to 4.1 ns in the Cray-4. Provided predictable timing and simplified design. The Cray-3’s initial clock speed target was extremely ambitious, but it proved difficult to achieve reliably with the GaAs technology.
Vector Processing Vector registers and functional units, similar to previous Cray designs. Continued the Cray tradition of vector processing for high performance on scientific and engineering applications.
Multiprocessing Designed to support up to 16 processors in a shared-memory configuration. Only systems with up to 8 processors were ever produced. Aimed to provide scalable performance by allowing multiple processors to work together on a single problem. However, the multiprocessing capabilities were limited by the available memory bandwidth.
Cycle Time
Clock Speed Initially targeted for 480 MHz (2.1 ns clock cycle), later reduced to 244 MHz (4.1 ns clock cycle) in the Cray-4. The initial clock speed goal was extremely ambitious but proved unattainable due to the limitations of GaAs technology. The reduced clock speed of the Cray-4 still offered competitive performance.
Memory Cycle Time 4 clock cycles (8.4 ns) for the first word, then one word per clock cycle. Used static RAM (SRAM) for main memory. Fast memory access was crucial for feeding the processors with data. The Cray-3’s memory system was designed to provide high bandwidth, but it was limited by the available GaAs memory technology.
Instruction Execution Time Variable, depending on instruction and whether it was scalar or vector: Similar to previous Cray designs, vector instructions offered significantly higher throughput than scalar instructions. The Cray-3’s performance was highly dependent on the ability to vectorize code.
* Execution times were targeted to be similar to or better than the Cray-2, but were ultimately hampered by the challenges with the clock speed.
Performance Enhancement
Vector Processing Continued emphasis on vector processing for high performance. Vector processing remained a key strength of the Cray architecture.
Pipelining Pipelined functional units, similar to previous Cray designs. Allowed for overlapped execution of instructions, improving throughput.
Multiprocessing Support for up to 16 processors (only up to 8 in practice) in a shared-memory configuration. Offered the potential for scalable performance, but the limited memory bandwidth and challenges with GaAs technology hindered the realization of this potential.
GaAs Technology The use of GaAs integrated circuits was intended to provide a significant speed advantage over silicon-based technologies. While GaAs offered the promise of higher speeds, its immaturity and manufacturing challenges ultimately limited its impact on the Cray-3’s performance and success.

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Key Takeaways:

  • Gallium Arsenide (GaAs) ICs: The Cray-3’s use of GaAs was a bold and innovative move, but the technology was not mature enough to deliver on its full potential.
  • Extremely Ambitious Clock Speed: The initial clock speed target of 480 MHz was far beyond what could be reliably achieved with GaAs at the time.
  • Limited Multiprocessing: While designed to support up to 16 processors, the Cray-3’s multiprocessing capabilities were constrained by memory bandwidth and the challenges of GaAs technology.
  • High Cost and Low Yield: The use of GaAs and the complex design resulted in very high manufacturing costs and low yields, making the Cray-3 extremely expensive.

The Cray-3 was a highly ambitious project that aimed to push the boundaries of supercomputer performance by leveraging the then-emerging GaAs technology. However, the immaturity of GaAs, combined with the inherent complexities of the Cray-3’s design, led to numerous technical challenges and ultimately limited its commercial success. While the Cray-3 did not achieve its initial performance goals, it represented an important step in the evolution of supercomputer technology and provided valuable lessons about the challenges of adopting new and unproven technologies.

 

Cray-3 Cooling, Packaging, and Interconnect table 

The Cray-3’s use of Gallium Arsenide (GaAs) integrated circuits, while promising higher speeds, presented significant challenges in terms of cooling, packaging, and interconnect. Here’s a table summarizing these aspects:

Aspect Details Impact and Considerations
Cooling
Liquid Immersion Cooling Continued the use of liquid immersion cooling, similar to the Cray-2: Modules were immersed in a bath of inert fluorocarbon liquid (Fluorinert) that circulated through the system, carrying away heat from the components. Essential for managing the heat generated by the GaAs circuits, which, despite having a lower power consumption per gate than ECL, had a higher power density due to the intended higher clock speeds. Allowed for very dense packaging of the modules.
No Heat Sinks Components had no heat sinks: Heat was transferred directly from the integrated circuits to the surrounding Fluorinert. Simplified the design of the modules and further increased component density. Eliminated the need for bulky heat sinks.
Pumps Pumps circulated the Fluorinert through the modules and a heat exchanger. Maintained a constant flow of coolant through the system, ensuring effective heat removal. The pumps were critical components of the cooling system.
Heat Exchanger External heat exchanger: Transferred the heat from the Fluorinert to a separate chilled water loop. Allowed the Cray-3 to dissipate its heat to the external environment. The heat exchanger was a crucial link between the Cray-3’s internal cooling system and the facility’s cooling infrastructure.
Packaging
Compact Cylindrical Chassis Smaller cylindrical chassis than the Cray-2: The chassis was even more compact, reflecting the higher density of the GaAs circuits. Further minimized wire lengths and contributed to the machine’s intended high performance. The compact design also made the Cray-3 more space-efficient.
3D Modules Continued the use of 3D modules: Each module consisted of a stack of four PCBs, interconnected with pins. Modules were very densely packed with GaAs ICs. Allowed for an incredibly high concentration of components in a small space. This was essential for achieving the Cray-3’s performance goals, but it also made manufacturing and assembly extremely challenging. The 3D modules were even more intricate than those used in the Cray-2.
Printed Circuit Boards (PCBs) Advanced multilayer PCBs: Used to interconnect the GaAs ICs within each module. Enabled dense and complex circuit layouts. The PCBs had to be carefully designed to manage signal integrity at the Cray-3’s high clock speeds and to handle the specific requirements of GaAs circuits.
Power Supplies Located in a separate cabinet: Similar to the Cray-2. Reduced the heat load within the main chassis and simplified the design of the cooling system.
Interconnect
PCB Traces Primary means of interconnection within modules: Copper traces on the multilayer PCBs connected the ICs on each board. Provided high-density interconnections within modules. Careful attention was paid to trace routing, impedance matching, and signal integrity due to the high clock speeds and the use of GaAs.
Inter-Module Connectors Vertical pins connecting the PCBs within a module: These pins provided the connections between the layers of the 3D modules. Enabled a very dense and compact module design. The inter-module connectors were a critical part of the Cray-3’s intricate interconnect system. Manufacturing tolerances were extremely tight.
Edge Connectors Used to connect the modules to each other within a column. Provided connections between the modules.
Cables Used for interconnections between columns and to external devices: The Cray-3 used controlled impedance cables for high-speed signals. Provided connections between the different parts of the system. The use of specialized cables helped to maintain signal integrity.

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Overall Challenges and Impact:

  • Thermal Management: While GaAs offered the potential for lower power consumption per gate than ECL, the intended higher clock speeds and increased circuit density still presented significant thermal challenges. The liquid immersion cooling system was essential for reliable operation.
  • Manufacturing Complexity: The Cray-3’s use of GaAs ICs, 3D modules, and intricate interconnects made it extremely difficult and expensive to manufacture. The low yield of GaAs chips was a major problem.
  • Signal Integrity: The high clock speeds and the use of GaAs required careful attention to signal integrity. The design of the PCBs, interconnections, and packaging had to be meticulously optimized to minimize signal reflections and crosstalk.
  • Reliability: The immaturity of GaAs technology and the complexity of the Cray-3’s design contributed to reliability issues.

Legacy:

The Cray-3 was a highly ambitious and innovative machine that pushed the boundaries of supercomputer design. However, the challenges associated with the use of GaAs technology, particularly the low yields and high costs, ultimately limited its commercial success. Only one Cray-3 was ever sold to a customer (NCAR). The Cray-3’s design, particularly its continued use of liquid immersion cooling and its exploration of GaAs circuits, provided valuable lessons about the challenges and limitations of emerging technologies. While the Cray-3 itself was not a commercial success, it represented an important step in the evolution of supercomputer technology and contributed to the ongoing quest for higher performance. Many of the engineers who worked on the Cray-3 went on to form the basis of the SRC supercomputer company.

 

Cray-3 Machine Design 

The Cray-3, developed by Seymour Cray in the late 1980s and early 1990s, was a bold attempt to push the boundaries of supercomputer performance by utilizing the then-new Gallium Arsenide (GaAs) semiconductor technology. Although it faced significant challenges and ultimately had limited commercial success, the Cray-3 was a remarkable machine in several respects. Here’s a detailed look at its key design elements:

  1. Architecture:
  • Multiprocessor System: The Cray-3 was designed to support up to 16 processors in a shared-memory configuration, although the most that were ever built into a single system was eight. This allowed for parallel processing, where multiple processors could work together on a single problem or run independent tasks concurrently.
  • Vector and Scalar Processing: Like its predecessors, the Cray-3 had both vector and scalar processing capabilities. Each processor included vector registers and functional units for high-speed vector operations, as well as scalar registers and units for general-purpose computations.
  • GaAs Integrated Circuits: The Cray-3’s most distinctive feature was its use of Gallium Arsenide (GaAs) integrated circuits instead of the traditional silicon. GaAs offered the potential for much higher switching speeds than silicon.
  • Word Length: 64 bits for data, similar to previous Cray machines. The instruction word length was 32 bits.
  • Registers: Each processor had:
    • Eight 64-element vector registers (V0-V7): Each element was 64 bits wide.
    • Eight 64-bit scalar registers (S0-S7).
    • Eight 32-bit address registers (A0-A7).
    • Eight 32-bit control registers (CA0-CA7).
    • Vector mask (VM) register and a vector length (VL) register.
    • Cluster Registers: Each group of four processors (called a cluster) had a set of 128 64-bit registers for inter-processor communication.
  1. Memory:
  • Common Memory: The Cray-3 used a shared memory architecture, where all processors had access to a common global memory. This simplified programming and allowed for efficient data sharing between processors.
  • Memory Technology: The memory was implemented using SRAM (Static RAM) built using GaAs technology. Using SRAM avoided refresh overhead and allowed lower latency.
  • Memory Capacity: Up to 512 MW (Megawords) or 4 GB.
  • Memory Organization: The memory was divided into sections and banks with interleaving to allow for multiple simultaneous memory accesses, increasing the effective memory bandwidth.
  • Memory Cycle Time: 4 clock cycles (8.4 ns) for the first word, then one word per clock cycle.
  1. Input/Output (I/O):
  • I/O Processors (IOS): The Cray-3 used separate I/O processors to handle communication with peripheral devices, similar to the approach used in the Cray-2. These I/O processors were based on silicon technology.
  • High-Speed Channels: The I/O processors were connected to the main system via high-speed channels.
  • Direct Memory Access (DMA): Allowed data transfers between I/O devices and common memory without involving the main processors.
  • Peripheral Devices: The Cray-3 could be connected to a variety of peripherals through a front-end computer, including:
    • Disk drives
    • Magnetic tape drives
    • Printers
    • Networking interfaces
  1. Instruction Set:
  • Similar to Cray-2: The Cray-3’s instruction set was similar to that of the Cray-2, with both scalar and vector instructions.
  • New Instructions: Added some new instructions to take advantage of the multiprocessor architecture and GaAs technology.
  • Vector Enhancements: Continued to improve vector processing capabilities.
  1. Performance Enhancements:
  • Gallium Arsenide (GaAs) Technology: The use of GaAs integrated circuits was the primary performance enhancement, promising significantly faster switching speeds than silicon.
  • High Clock Speed: The initial target clock speed was 480 MHz (2.1 ns cycle time), although this was later reduced in the Cray-4. This was extremely ambitious for the time.
  • Vector Processing: Continued emphasis on vector processing for high performance on scientific and engineering applications.
  • Pipelining: Pipelined functional units, similar to previous Cray designs.
  • Multiprocessing: Support for up to 16 processors (although only up to 8 were ever implemented in a single system) offered the potential for scalable performance.
  • Common Memory with Interleaving: Allowed for multiple simultaneous memory accesses, increasing memory bandwidth.
  1. Physical Design:
  • Compact Cylindrical Chassis: The Cray-3 had an even smaller cylindrical chassis than the Cray-2, reflecting the higher circuit density made possible by GaAs technology.
  • 3D Modules: Continued the use of 3D modules, with four PCBs per module, interconnected with pins.
  • Liquid Immersion Cooling: The entire system (except for power supplies) was immersed in a bath of inert fluorocarbon liquid (Fluorinert) for cooling.
  • External Heat Exchanger: An external heat exchanger transferred the heat from the Fluorinert to a chilled water loop.
  1. Software:
  • UNICOS: The Cray-3 ran UNICOS, a UNIX-based operating system that was also used on other Cray systems.
  • Cray FORTRAN (CFT77): A highly optimizing FORTRAN compiler that could automatically vectorize and parallelize code for the Cray-3’s architecture.
  • C, Pascal: Other high-level languages were also supported.
  • Cray Assembly Language (CAL): Assembly language for the Cray-3.
  • Scientific Libraries: BLAS, LINPACK, EISPACK, and other libraries optimized for the Cray-3’s architecture.

Challenges and Limitations:

  • GaAs Immaturity: GaAs technology was still in its early stages of development and proved to be much more challenging to work with than silicon. Manufacturing yields were very low, and the chips were extremely expensive.
  • Clock Speed Target Unreachable: The initial 480 MHz clock speed target was overly ambitious and could not be reliably achieved with the available GaAs technology.
  • Limited Memory Bandwidth: The Cray-3’s memory bandwidth was not sufficient to keep up with the processing power of multiple processors, especially when running applications that could not be effectively vectorized.
  • High Cost: The Cray-3 was an extremely expensive machine to develop and build, largely due to the high cost of GaAs components and the complex manufacturing process.
  • Competition: By the time the Cray-3 was ready for production, the supercomputer market was shifting towards massively parallel processors (MPPs) built with CMOS technology, which offered better price/performance ratios.

Outcome and Legacy:

The Cray-3 was a commercial failure. Only one Cray-3 was ever sold to a customer (NCAR), and Cray Computer Corporation, the company Seymour Cray had formed to develop the Cray-3 and Cray-4, went bankrupt in 1995.

Despite its lack of commercial success, the Cray-3 was a significant machine in the history of supercomputing. It represented a bold attempt to push the boundaries of performance by embracing a new and unproven technology (GaAs). While the Cray-3 itself did not achieve its full potential, it provided valuable lessons about the challenges of developing and deploying emerging technologies. It also further enhanced Seymour Cray’s legacy as a visionary architect who was always willing to take risks in pursuit of ultimate performance. The Cray-3’s innovations in packaging, cooling, and the exploration of GaAs technology influenced future supercomputer designs, even though the industry ultimately moved in a different direction.

 

Cray-3 Software table

The Cray-3, despite its limited commercial success, had a software ecosystem that built upon previous Cray systems and adapted to the Cray-3’s unique architecture. Here’s a table summarizing some of the key software developed for the Cray-3:

Software Name/Type Description Significance
Operating Systems
UNICOS The primary operating system for the Cray-3. It was a UNIX-based operating system, similar to what was used on the Cray-2 and other contemporary Cray systems. Provided a familiar environment for users and supported both interactive and batch processing. Cray’s adoption of UNIX as its standard operating system reflected the growing importance of open systems and industry standards. UNICOS provided a stable and powerful platform for running applications on the Cray-3.
Compilers
Cray FORTRAN (cf77) A highly optimizing FORTRAN compiler that was adapted to take advantage of the Cray-3’s architecture, including its vector processing capabilities and multiple processors. FORTRAN remained the dominant language for scientific and engineering programming. The cf77 compiler was essential for achieving high performance on the Cray-3, and it included features for automatic vectorization and parallelization.
C A C compiler for the Cray-3. Became increasingly important as UNIX gained popularity. Provided a systems programming alternative to FORTRAN and facilitated the development of new applications and tools on the Cray-3.
Pascal A Pascal compiler was available for the Cray-3. Offered another high-level language option, although FORTRAN and C were more widely used.
Assemblers
CAL (Cray Assembly Language) The assembly language for the Cray-3. Allowed programmers to write code that directly controlled the machine’s hardware, including its GaAs processors. Provided maximum control and flexibility for performance optimization. Essential for system programming, developing performance-critical kernels, and implementing specialized algorithms that could not be adequately handled by higher-level languages.
Libraries
BLAS (Basic Linear Algebra Subprograms) A library of highly optimized routines for performing basic linear algebra operations. Adapted for the Cray-3’s vector processing and multiprocessing capabilities. Provided fundamental building blocks for many scientific and engineering applications. The BLAS routines were essential for achieving high performance in linear algebra computations, a core component of many scientific algorithms.
LINPACK A library of routines for solving systems of linear equations. Often used as a benchmark for measuring the performance of high-performance computers. Provided a standard set of routines for solving linear systems. LINPACK performance was a key metric for evaluating the Cray-3’s capabilities.
EISPACK A library of routines for solving eigenvalue problems. Another important library for scientific computing, used in applications such as structural analysis and quantum mechanics.
Other Scientific Libraries Other specialized libraries were likely developed or adapted for the Cray-3 to support various scientific and engineering applications, although documentation on these is scarce due to the machine’s limited commercial deployment. These libraries would have provided tools and algorithms for specific domains, such as fluid dynamics, structural analysis, and molecular modeling.
Debugging and Performance Tools
Debuggers Debugging tools were adapted for the Cray-3 to help programmers identify and fix errors in their code. Debugging on a multiprocessor system with GaAs technology presented unique challenges. Essential for program development. Debugging on a complex machine like the Cray-3, especially with its relatively new GaAs technology, required specialized tools.
Performance Analysis Tools Performance analysis tools were likely developed or adapted to help programmers optimize their code for the Cray-3’s architecture. Understanding how code utilized the Cray-3’s processors, memory, and vector units was crucial for achieving peak performance. Performance analysis tools helped programmers identify bottlenecks and improve the efficiency of their code.

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Important Notes:

  • Limited Commercial Deployment: Due to the Cray-3’s limited commercial success, the amount of software specifically developed for it was less than for more widely used Cray systems.
  • UNICOS and FORTRAN: UNICOS and FORTRAN remained the core software components of the Cray ecosystem, and their availability on the Cray-3 helped to ensure some continuity for users migrating from other Cray platforms.
  • Challenges of GaAs: The use of GaAs technology presented unique challenges for software development, as tools and techniques had to be adapted to the new hardware.
  • Scarce Documentation: Due to the Cray-3’s limited production run and the closure of Cray Computer Corporation, detailed documentation on its software ecosystem is relatively scarce compared to other Cray systems.

Despite the Cray-3’s limited commercial success, a software ecosystem did exist to support its operation and enable its use in scientific applications. The core components of this ecosystem, such as UNICOS, the Cray FORTRAN compiler, and optimized libraries, built upon the established software base of previous Cray systems. However, the Cray-3’s unique architecture and the challenges of GaAs technology required adaptations and new developments in areas such as debugging and performance analysis tools. The limited availability of detailed documentation makes it difficult to fully assess the breadth and depth of the Cray-3 software ecosystem, but it is clear that efforts were made to provide a functional and relatively complete software environment for this ambitious machine.

 

Cray-3 Marketing table, Sales table

Let’s break down the Cray-3’s marketing and sales into two separate tables for better clarity:

Cray-3 Marketing Table

Marketing Aspect Details Impact and Significance
Positioning
Next-Generation Technology Positioned as a revolutionary machine leveraging Gallium Arsenide (GaAs) for unprecedented performance. Created excitement but set very high expectations that were difficult to meet in reality.
Seymour Cray’s Vision Heavily marketed as the latest creation from the legendary Seymour Cray, capitalizing on his reputation as a supercomputing pioneer. Leveraged Cray’s name and reputation to generate interest and trust. However, it also linked the machine’s success directly to Cray’s personal involvement.
Performance Leadership Despite GaAs challenges, the marketing continued to emphasize the Cray-3’s potential for performance leadership, promising significant speedups over existing systems. This message was weakened when the delivered systems didn’t meet initial performance projections, hurting credibility.
Target Audience
Existing Cray Customers Primarily targeted users of Cray-1, X-MP, Y-MP, and Cray-2 systems who sought the highest possible performance. Logical starting point, but many existing customers opted for the more proven and cost-effective Y-MP or were drawn to emerging MPP systems.
National Laboratories Focused on national labs with computationally intensive missions (defense, energy, basic research). These institutions were traditional supercomputer users, but competition was increasing, and budgets were tightening.
Weather and Climate Centers Targeted due to the demanding computational needs of weather and climate modeling. The Cray-3’s high price and the rise of more cost-effective alternatives made it a difficult sell in this sector.
Select Universities Only the most well-funded research universities with extreme performance requirements were considered. The Cray-3’s price tag made it largely inaccessible to the academic community.
Marketing Channels
Industry Conferences Cray-3 was presented at supercomputing conferences and trade shows. Provided visibility but also exposed the machine’s technical challenges and limited availability.
Technical Publications Papers and articles were published on the Cray-3’s architecture and technology. Disseminated information but also revealed the difficulties encountered during development.
Direct Sales Seymour Cray and a small, dedicated sales team engaged directly with potential customers. Personalized approach, but the limited number of systems and high price meant a very narrow sales focus.
Marketing Messages
Gallium Arsenide Advantage Highlighted the potential of GaAs for higher clock speeds and faster performance than silicon. Main differentiator, but the message lost its impact as GaAs’s challenges became apparent.
Compact Design Emphasized the Cray-3’s small size, enabled by GaAs and liquid immersion cooling. Appealed to customers with space constraints, but the cooling system still required significant infrastructure.
Evolutionary Path Presented as the next logical step in the Cray supercomputer lineage. Aimed to reassure existing customers, but the Cray-3’s significant technological differences made this a less convincing argument for some.
Seymour Cray’s Genius Continued to emphasize Seymour Cray’s visionary design and his track record of building the world’s fastest computers. Generated initial interest but created pressure to deliver on high expectations, which became difficult as the project faced setbacks.
Challenges
Unproven Technology The reliance on immature GaAs technology created significant risks and uncertainties. Made potential customers hesitant to invest in the Cray-3, especially given its high price.
Overly Optimistic Projections Initial performance projections were unrealistic and could not be met. Damaged credibility when the delivered systems fell short of expectations.
High Cost The Cray-3’s extreme price tag limited its market to a very small number of organizations. Made it difficult to compete with more cost-effective solutions that were emerging.
Competition Faced strong competition from Cray Research’s Y-MP and the growing popularity of massively parallel processors. Gave customers more choices and made it harder for the Cray-3 to stand out.

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Cray-3 Sales Table

Customer Number of Systems Configuration Delivery Date Notes
National Center for Atmospheric Research (NCAR) 1 4 Processors, 256 Megawords of memory May 1993 Only Cray-3 ever sold and installed at a customer site. Used for a short period for climate modeling and other scientific applications. Never entered production status and was eventually decommissioned.
Cray Computer Corporation (Internal Use) ~3-4 Various 1991-1993 Several Cray-3 systems were built and used internally at Cray Computer Corporation for development, testing, and demonstration purposes. These were never officially sold to external customers.
Totals ~4-5 Extremely limited sales. Only a handful of Cray-3 systems were ever built, highlighting the machine’s commercial failure. The Cray-4, intended as a successor with a more conservative clock rate, was never completed or sold.

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Reasons for Limited Sales:

  • High Cost: GaAs components and complex manufacturing made the Cray-3 extremely expensive.
  • Technological Challenges: GaAs proved difficult to work with, resulting in low yields and reliability issues. The ambitious clock speed target was not met.
  • Competition: Cray Research’s own Y-MP offered a more proven and cost-effective solution, while Massively Parallel Processors (MPPs) were gaining traction.
  • Changing Market: The supercomputer market was shifting towards CMOS-based systems with better price/performance ratios.
  • Cray Computer Corporation Bankruptcy: The company’s financial difficulties and eventual bankruptcy in 1995 ended the Cray-3 project.

Conclusion:

The marketing of the Cray-3, while initially generating excitement due to Seymour Cray’s involvement and the promise of GaAs technology, ultimately failed to translate into significant sales. The machine’s high cost, technical challenges, and the evolving market conditions proved to be insurmountable obstacles. The Cray-3’s story serves as a cautionary tale about the risks of relying on unproven technologies and the importance of balancing innovation with market realities.

 

Cray-4 Cancelled

Cray-4 Cancelled explanation

The Cray-4 was a planned supercomputer from Cray Computer Corporation (CCC), founded by Seymour Cray after he left Cray Research. It was intended to be the successor to the Cray-3 and compete with the Cray Research T90. However, the Cray-4 project was ultimately canceled, and no machines were ever delivered.

Here are the primary reasons for the Cray-4’s cancellation:

  • Financial Difficulties: CCC faced significant financial challenges. The development of cutting-edge supercomputers is incredibly expensive, and CCC struggled to secure the necessary funding. This was exacerbated by the fact that the Cray-3, its predecessor, was not a commercial success.
  • Technical Challenges: Like many of Cray’s designs, the Cray-4 pushed the boundaries of technology. It aimed for a very high clock speed (1 GHz) and a large number of processors (up to 64). Achieving this proved difficult, and delays in development likely contributed to the financial strain.
  • Market Competition: The supercomputer market was becoming increasingly competitive. Other companies were developing powerful machines, and CCC faced pressure to deliver a competitive product.
  • Cancellation of the LLNL Order: In December 1991, CCC received a significant order from Lawrence Livermore National Laboratory (LLNL) for the Cray-4. However, CCC was unable to meet the delivery and performance goals, led at the time by Director John Nuckolls, and the order was canceled. This was a major blow to the company.
  • Bankruptcy: Ultimately, CCC’s financial problems became insurmountable. The company filed for bankruptcy in 1995, and work on the Cray-4 was halted.

In essence, the Cray-4’s cancellation was a result of a combination of financial struggles, technical hurdles, market pressures, and the loss of a key order. It highlights the challenges of developing and selling high-end supercomputers, even for a visionary like Seymour Cray.

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